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Add IPs

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This commit is contained in:
Davide Cavagnola
2025-05-11 23:43:59 +02:00
parent 9c20fe7e7c
commit 079d1ab0d5
21 changed files with 3372 additions and 0 deletions
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20
LAB3/ip/axi4-stream-spi-master/cocotb/Makefile Normal file
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export PYTHON_BIN=python3
PWD := $(shell pwd)
SIM ?= ghdl
SIM_ARGS ?= --wave=$(PWD)/build/waveform.ghw -gc_clkfreq=100000000 -gc_sclkfreq=10000000
GHDL_ARGS ?= -fsynopsys
TOPLEVEL_LANG = vhdl
SIM_BUILD = $(PWD)/build
MODULE = tester_axis_lw_spi_master
TOPLEVEL = axis_lw_spi_master
HDL_DIR = $(PWD)/../hdl
VHDL_SOURCES = \
$(HDL_DIR)/spi_master_lightweight/rtl/lw_spi_master.vhd \
$(HDL_DIR)/axis_lw_spi_master.vhd
include $(shell cocotb-config --makefiles)/Makefile.sim