Add loopback design files and update project configurations

- Created a new loopback design file (loopback.bda) with nodes and edges defined in GraphML format.
- Added a new Vivado project file for loopback (loopback.xpr) with updated configurations.
- Introduced a new testbench for image convolution (img_conv_tb.vhd) in the simulation sources.
- Updated the main project file (lab2.xpr) to reflect changes in source files and top module for simulation.
- Removed obsolete project files (pak_depak.xpr.zip) and updated paths for existing source files.

LAB2/design/lab_2/lab_2.bd

@@ -1169,20 +1169,6 @@
       }
     },
     "interface_nets": {
-      "Conn": {
-        "interface_ports": [
-          "rgb2gray_0/s_axis",
-          "depacketizer_0/m_axis",
-          "system_ila_0/SLOT_0_AXIS"
-        ]
-      },
-      "rgb2gray_0_m_axis": {
-        "interface_ports": [
-          "rgb2gray_0/m_axis",
-          "bram_writer_0/s_axis",
-          "system_ila_0/SLOT_2_AXIS"
-        ]
-      },
       "img_conv_0_m_axis": {
         "interface_ports": [
           "img_conv_0/m_axis",
@@ -1207,6 +1193,20 @@
           "packetizer_0/m_axis",
           "AXI4Stream_UART_0/S00_AXIS_TX"
         ]
+      },
+      "Conn": {
+        "interface_ports": [
+          "rgb2gray_0/s_axis",
+          "depacketizer_0/m_axis",
+          "system_ila_0/SLOT_0_AXIS"
+        ]
+      },
+      "rgb2gray_0_m_axis": {
+        "interface_ports": [
+          "rgb2gray_0/m_axis",
+          "bram_writer_0/s_axis",
+          "system_ila_0/SLOT_2_AXIS"
+        ]
       }
     },
     "nets": {