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Refactor testbench for bram_writer: update description, increase image size, and enhance signal handling for improved simulation accuracy

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Davide Cavagnola
2025-04-23 01:49:46 +02:00
parent 722b479811
commit 5995a532f5
5 changed files with 124 additions and 95 deletions
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66
LAB2/src/rgb2gray.vhd
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@@ -37,18 +37,17 @@ ARCHITECTURE Behavioral OF rgb2gray IS
SIGNAL r_val, g_val : UNSIGNED(7 DOWNTO 0);
SIGNAL sum : UNSIGNED(8 DOWNTO 0);
SIGNAL gray : UNSIGNED(6 DOWNTO 0);
SIGNAL send_data : STD_LOGIC := '0';
SIGNAL m_axis_tvalid_int : STD_LOGIC := '0';
SIGNAL m_axis_tdata_int : STD_LOGIC_VECTOR(7 DOWNTO 0) := (OTHERS => '0');
SIGNAL s_axis_tready_int : STD_LOGIC := '1';
SIGNAL s_axis_tready_int : STD_LOGIC := '0';
SIGNAL trigger : STD_LOGIC := '0';
SIGNAL last_seen : STD_LOGIC := '0';
BEGIN
-- Port mappings
m_axis_tvalid <= m_axis_tvalid_int;
m_axis_tdata <= m_axis_tdata_int;
s_axis_tready <= s_axis_tready_int;
m_axis_tvalid <= m_axis_tvalid_int;
-- Divider instance
DIVIDER : divider_by_3
@@ -66,56 +65,69 @@ BEGIN
IF resetn = '0' THEN
-- Reset all signals
state <= WAIT_R;
s_axis_tready_int <= '1';
s_axis_tready_int <= '0';
m_axis_tvalid_int <= '0';
m_axis_tdata <= (OTHERS => '0');
m_axis_tlast <= '0';
m_axis_tdata_int <= (OTHERS => '0');
r_val <= (OTHERS => '0');
g_val <= (OTHERS => '0');
sum <= (OTHERS => '0');
send_data <= '0';
trigger <= '0';
ELSE
-- Propagate TLAST
m_axis_tlast <= s_axis_tlast;
-- Clear valid once data has been accepted
IF m_axis_tvalid_int = '1' AND m_axis_tready = '1' THEN
-- Input data - slave
s_axis_tready_int <= m_axis_tready;
IF s_axis_tlast = '1' THEN
last_seen <= '1';
ELSE
m_axis_tlast <= '0';
END IF;
-- Output data - master
IF m_axis_tready = '1' THEN
m_axis_tvalid_int <= '0';
END IF;
-- Issue new output only when back?pressure is released
IF send_data = '1' AND m_axis_tready = '1' THEN
m_axis_tdata_int <= '0' & STD_LOGIC_VECTOR(gray); -- MSB zero + 7?bit gray
IF trigger = '1' AND (m_axis_tvalid_int = '0' OR m_axis_tready = '1') THEN
m_axis_tvalid_int <= '1';
send_data <= '0';
m_axis_tdata <= '0' & STD_LOGIC_VECTOR(gray); -- MSB zero + 7bit gray
IF last_seen = '1' THEN
m_axis_tlast <= '1';
last_seen <= '0';
END IF;
trigger <= '0';
END IF;
-- Back?pressure: blocca ingresso finch<63> non hai trasmesso
IF send_data = '1' OR (m_axis_tvalid_int = '1' AND m_axis_tready = '0') THEN
s_axis_tready_int <= '0';
ELSE
s_axis_tready_int <= '1';
END IF;
-- FSM per ricezione R, G, B
-- State machine for R, G, B values buffering
CASE state IS
WHEN WAIT_R =>
IF s_axis_tvalid = '1' AND s_axis_tready_int = '1' THEN
r_val <= unsigned(s_axis_tdata);
state <= WAIT_G;
END IF;
WHEN WAIT_G =>
IF s_axis_tvalid = '1' AND s_axis_tready_int = '1' THEN
g_val <= unsigned(s_axis_tdata);
state <= WAIT_B;
END IF;
WHEN WAIT_B =>
IF s_axis_tvalid = '1' AND s_axis_tready_int = '1' THEN
sum <= RESIZE(r_val + g_val + unsigned(s_axis_tdata), 9);
send_data <= '1';
sum <= RESIZE(r_val + g_val + unsigned(s_axis_tdata), sum'length);
trigger <= '1';
state <= WAIT_R;
END IF;
END CASE;