Add initial design files and project configuration for LAB3

- Created a new Block Design Archive (lab_3.bda) for LAB3, defining nodes and edges for the design.
- Added a placeholder README file in the simulation directory.
- Initialized a Vivado project file (lab3.xpr) with configuration settings and source files for synthesis and simulation.
- Updated vhdl_ls.toml to include LAB3 source and simulation files for VHDL language server support.

vhdl_ls.toml

@@ -15,10 +15,10 @@ lab2_lib.files = [
     "LAB2/sim/**/*.vhd"
 ]
 
-# lab3_lib.files = [
-#     "LAB3/src/**/*.vhd",
-#     "LAB3/sim/**/*.vhd"
-# ]
+lab3_lib.files = [
+    "LAB3/src/**/*.vhd",
+    "LAB3/sim/**/*.vhd"
+]
 
 xpm.files = [
   "C:/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_VCOMP.vhd"