Add new VHDL entities for image processing and update test scripts for Lab2
This commit is contained in:
35
LAB2/src/depacketizer.vhd
Normal file
35
LAB2/src/depacketizer.vhd
Normal file
@@ -0,0 +1,35 @@
|
||||
library ieee;
|
||||
use ieee.std_logic_1164.all;
|
||||
use ieee.numeric_std.all;
|
||||
|
||||
|
||||
entity depacketizer is
|
||||
generic (
|
||||
HEADER: INTEGER :=16#FF#;
|
||||
FOOTER: INTEGER :=16#F1#
|
||||
);
|
||||
port (
|
||||
clk : in std_logic;
|
||||
aresetn : in std_logic;
|
||||
|
||||
s_axis_tdata : in std_logic_vector(7 downto 0);
|
||||
s_axis_tvalid : in std_logic;
|
||||
s_axis_tready : out std_logic;
|
||||
|
||||
m_axis_tdata : out std_logic_vector(7 downto 0);
|
||||
m_axis_tvalid : out std_logic;
|
||||
m_axis_tready : in std_logic;
|
||||
m_axis_tlast : out std_logic
|
||||
|
||||
);
|
||||
end entity depacketizer;
|
||||
|
||||
architecture rtl of depacketizer is
|
||||
|
||||
|
||||
|
||||
begin
|
||||
|
||||
|
||||
|
||||
end architecture;
|
||||
Reference in New Issue
Block a user