Refactor code structure for improved readability and maintainability
This commit is contained in:
178
LAB3/src/LFO.vhd
178
LAB3/src/LFO.vhd
@@ -1,40 +1,154 @@
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library IEEE;
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use IEEE.STD_LOGIC_1164.ALL;
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LIBRARY IEEE;
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USE IEEE.STD_LOGIC_1164.ALL;
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-- Uncomment the following library declaration if using
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-- arithmetic functions with Signed or Unsigned values
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use IEEE.NUMERIC_STD.ALL;
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USE IEEE.NUMERIC_STD.ALL;
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entity LFO is
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generic(
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CHANNEL_LENGHT : integer := 24;
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JOYSTICK_LENGHT : integer := 10;
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CLK_PERIOD_NS : integer := 10;
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TRIANGULAR_COUNTER_LENGHT : integer := 10 -- Triangular wave period length
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ENTITY LFO IS
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GENERIC (
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CHANNEL_LENGHT : INTEGER := 24;
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JOYSTICK_LENGHT : INTEGER := 10;
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CLK_PERIOD_NS : INTEGER := 10;
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TRIANGULAR_COUNTER_LENGHT : INTEGER := 10 -- Triangular wave period length
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);
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Port (
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aclk : in std_logic;
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aresetn : in std_logic;
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lfo_period : in std_logic_vector(JOYSTICK_LENGHT-1 downto 0);
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lfo_enable : in std_logic;
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s_axis_tvalid : in std_logic;
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s_axis_tdata : in std_logic_vector(CHANNEL_LENGHT-1 downto 0);
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s_axis_tlast : in std_logic;
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s_axis_tready : out std_logic;
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m_axis_tvalid : out std_logic;
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m_axis_tdata : out std_logic_vector(CHANNEL_LENGHT-1 downto 0);
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m_axis_tlast : out std_logic;
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m_axis_tready : in std_logic
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);
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end entity LFO;
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PORT (
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architecture Behavioral of LFO is
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aclk : IN STD_LOGIC;
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aresetn : IN STD_LOGIC;
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begin
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lfo_period : IN STD_LOGIC_VECTOR(JOYSTICK_LENGHT - 1 DOWNTO 0);
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end architecture;
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lfo_enable : IN STD_LOGIC;
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s_axis_tvalid : IN STD_LOGIC;
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s_axis_tdata : IN STD_LOGIC_VECTOR(CHANNEL_LENGHT - 1 DOWNTO 0);
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s_axis_tlast : IN STD_LOGIC;
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s_axis_tready : OUT STD_LOGIC;
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m_axis_tvalid : OUT STD_LOGIC;
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m_axis_tdata : OUT STD_LOGIC_VECTOR(CHANNEL_LENGHT - 1 DOWNTO 0);
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m_axis_tlast : OUT STD_LOGIC;
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m_axis_tready : IN STD_LOGIC
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);
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END ENTITY LFO;
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ARCHITECTURE Behavioral OF LFO IS
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CONSTANT LFO_COUNTER_BASE_PERIOD_NS : INTEGER := 100000;
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CONSTANT ADJUSTMENT_FACTOR : INTEGER := 90;
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SIGNAL step_counter : INTEGER := 1;
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SIGNAL tri_counter : signed(CHANNEL_LENGHT - 1 DOWNTO 0) := (OTHERS => '0');
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SIGNAL direction_up : STD_LOGIC := '1';
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SIGNAL lfo_tick : STD_LOGIC := '0';
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SIGNAL lfo_period_int : INTEGER := LFO_COUNTER_BASE_PERIOD_NS;
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SIGNAL m_axis_tvalid_i : STD_LOGIC := '0';
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SIGNAL m_axis_tdata_i : STD_LOGIC_VECTOR(CHANNEL_LENGHT - 1 DOWNTO 0) := (OTHERS => '0');
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SIGNAL m_axis_tlast_i : STD_LOGIC := '0';
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SIGNAL s_axis_tready_i : STD_LOGIC := '1';
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SIGNAL temp : STD_LOGIC_VECTOR(CHANNEL_LENGHT + TRIANGULAR_COUNTER_LENGHT - 1 DOWNTO 0) := (OTHERS => '0');
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BEGIN
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PROCESS (aclk)
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BEGIN
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IF rising_edge(aclk) THEN
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lfo_period_int <= LFO_COUNTER_BASE_PERIOD_NS - ADJUSTMENT_FACTOR * to_integer(unsigned(lfo_period));
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END IF;
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END PROCESS;
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-- Optimized single process for LFO step and triangular waveform generation
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PROCESS (aclk)
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BEGIN
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IF rising_edge(aclk) THEN
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IF aresetn = '0' THEN
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step_counter <= 0;
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tri_counter <= (OTHERS => '0');
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direction_up <= '1';
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lfo_tick <= '0';
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ELSIF lfo_enable = '1' THEN
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IF step_counter < lfo_period_int THEN
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step_counter <= step_counter + 1;
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lfo_tick <= '0';
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ELSE
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step_counter <= 0;
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lfo_tick <= '1';
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IF direction_up = '1' THEN
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IF tri_counter = 2 ** TRIANGULAR_COUNTER_LENGHT - 1 THEN
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direction_up <= '0';
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tri_counter <= tri_counter - 1;
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ELSE
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tri_counter <= tri_counter + 1;
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END IF;
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ELSE
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IF tri_counter = 0 THEN
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direction_up <= '1';
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tri_counter <= tri_counter + 1;
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ELSE
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tri_counter <= tri_counter - 1;
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END IF;
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END IF;
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END IF;
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ELSE
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lfo_tick <= '0';
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direction_up <= '1';
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tri_counter <= (OTHERS => '0');
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step_counter <= 0;
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END IF;
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END IF;
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END PROCESS;
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PROCESS (aclk)
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BEGIN
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IF rising_edge(aclk) THEN
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IF aresetn = '0' THEN
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temp <= (OTHERS => '0');
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ELSIF s_axis_tvalid = '1' AND m_axis_tready = '1' AND lfo_enable = '1' THEN
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temp <= STD_LOGIC_VECTOR(
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resize(
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signed(s_axis_tdata) * signed(resize(tri_counter, s_axis_tdata'length)),
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temp'length
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)
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);
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END IF;
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END IF;
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END PROCESS;
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PROCESS (aclk)
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BEGIN
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IF rising_edge(aclk) THEN
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IF aresetn = '0' THEN
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m_axis_tvalid_i <= '0';
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m_axis_tdata_i <= (OTHERS => '0');
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m_axis_tlast_i <= '0';
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ELSE
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IF s_axis_tvalid = '1' AND m_axis_tready = '1' THEN
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IF lfo_enable = '1' THEN
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m_axis_tdata_i <= temp(temp'high DOWNTO temp'high - (CHANNEL_LENGHT - 1));
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ELSE
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m_axis_tdata_i <= s_axis_tdata;
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END IF;
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s_axis_tready_i <= '0';
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m_axis_tvalid_i <= '1';
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m_axis_tlast_i <= s_axis_tlast;
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END IF;
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IF m_axis_tvalid_i = '1' THEN
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IF m_axis_tready = '0' THEN
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s_axis_tready_i <= '0';
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ELSE
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s_axis_tready_i <= '1';
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END IF;
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m_axis_tvalid_i <= '0';
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END IF;
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END IF;
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END IF;
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END PROCESS;
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s_axis_tready <= s_axis_tready_i;
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m_axis_tdata <= m_axis_tdata_i;
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m_axis_tvalid <= m_axis_tvalid_i;
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m_axis_tlast <= m_axis_tlast_i;
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END ARCHITECTURE Behavioral;
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@@ -1,29 +1,69 @@
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library IEEE;
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use IEEE.STD_LOGIC_1164.ALL;
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use ieee.numeric_std.all;
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LIBRARY IEEE;
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USE IEEE.STD_LOGIC_1164.ALL;
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USE ieee.numeric_std.ALL;
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entity all_pass_filter is
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generic (
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TDATA_WIDTH : positive := 24
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ENTITY all_pass_filter IS
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GENERIC (
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TDATA_WIDTH : POSITIVE := 24
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);
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Port (
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aclk : in std_logic;
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aresetn : in std_logic;
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PORT (
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aclk : IN STD_LOGIC;
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aresetn : IN STD_LOGIC;
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s_axis_tvalid : in std_logic;
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s_axis_tdata : in std_logic_vector(TDATA_WIDTH-1 downto 0);
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s_axis_tlast : in std_logic;
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s_axis_tready : out std_logic;
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s_axis_tvalid : IN STD_LOGIC;
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s_axis_tdata : IN STD_LOGIC_VECTOR(TDATA_WIDTH - 1 DOWNTO 0);
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s_axis_tlast : IN STD_LOGIC;
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s_axis_tready : OUT STD_LOGIC;
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m_axis_tvalid : out std_logic;
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m_axis_tdata : out std_logic_vector(TDATA_WIDTH-1 downto 0);
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m_axis_tlast : out std_logic;
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m_axis_tready : in std_logic
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m_axis_tvalid : OUT STD_LOGIC;
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m_axis_tdata : OUT STD_LOGIC_VECTOR(TDATA_WIDTH - 1 DOWNTO 0);
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m_axis_tlast : OUT STD_LOGIC;
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m_axis_tready : IN STD_LOGIC
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);
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end all_pass_filter;
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END all_pass_filter;
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architecture Behavioral of all_pass_filter is
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ARCHITECTURE Behavioral OF all_pass_filter IS
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begin
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SIGNAL s_axis_tready_int : STD_LOGIC := '0';
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SIGNAL m_axis_tvalid_int : STD_LOGIC := '0';
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end Behavioral;
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BEGIN
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-- Output assignments
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s_axis_tready <= s_axis_tready_int;
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m_axis_tvalid <= m_axis_tvalid_int;
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PROCESS (aclk)
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BEGIN
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IF rising_edge(aclk) THEN
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IF aresetn = '0' THEN
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s_axis_tready_int <= '0';
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m_axis_tvalid_int <= '0';
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ELSE
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-- Clear valid flag when master interface is ready
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IF m_axis_tready = '1' THEN
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m_axis_tvalid_int <= '0';
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END IF;
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IF s_axis_tvalid = '1' AND s_axis_tready_int = '1' THEN
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IF m_axis_tvalid_int = '0' OR m_axis_tready = '1' THEN
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s_axis_tready_int <= '1'; -- Keep reading from slave interface
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m_axis_tvalid_int <= '1'; -- Set valid flag for master interface
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m_axis_tdata <= s_axis_tdata;
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m_axis_tlast <= s_axis_tlast;
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ELSE
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s_axis_tready_int <= '0'; -- Block slave interface to avoid data loss
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END IF;
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END IF;
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END IF;
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END IF;
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END PROCESS;
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END Behavioral;
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@@ -1,32 +1,99 @@
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library IEEE;
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use IEEE.STD_LOGIC_1164.ALL;
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use ieee.numeric_std.all;
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LIBRARY IEEE;
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USE IEEE.STD_LOGIC_1164.ALL;
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USE ieee.numeric_std.ALL;
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entity moving_average_filter is
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generic (
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ENTITY moving_average_filter IS
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GENERIC (
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-- Filter order expressed as 2^(FILTER_ORDER_POWER)
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FILTER_ORDER_POWER : integer := 5;
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FILTER_ORDER_POWER : INTEGER := 5;
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TDATA_WIDTH : positive := 24
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TDATA_WIDTH : POSITIVE := 24
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);
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Port (
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aclk : in std_logic;
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aresetn : in std_logic;
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PORT (
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aclk : IN STD_LOGIC;
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aresetn : IN STD_LOGIC;
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s_axis_tvalid : in std_logic;
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s_axis_tdata : in std_logic_vector(TDATA_WIDTH-1 downto 0);
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s_axis_tlast : in std_logic;
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s_axis_tready : out std_logic;
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s_axis_tvalid : IN STD_LOGIC;
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s_axis_tdata : IN STD_LOGIC_VECTOR(TDATA_WIDTH - 1 DOWNTO 0);
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s_axis_tlast : IN STD_LOGIC;
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s_axis_tready : OUT STD_LOGIC;
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m_axis_tvalid : out std_logic;
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m_axis_tdata : out std_logic_vector(TDATA_WIDTH-1 downto 0);
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m_axis_tlast : out std_logic;
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m_axis_tready : in std_logic
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m_axis_tvalid : OUT STD_LOGIC;
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m_axis_tdata : OUT STD_LOGIC_VECTOR(TDATA_WIDTH - 1 DOWNTO 0);
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m_axis_tlast : OUT STD_LOGIC;
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m_axis_tready : IN STD_LOGIC
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);
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end moving_average_filter;
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END moving_average_filter;
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architecture Behavioral of moving_average_filter is
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ARCHITECTURE Behavioral OF moving_average_filter IS
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begin
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CONSTANT FILTER_ORDER : INTEGER := 2 ** FILTER_ORDER_POWER;
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end Behavioral;
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TYPE sample_array IS ARRAY (0 TO FILTER_ORDER - 1) OF signed(TDATA_WIDTH - 1 DOWNTO 0);
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SIGNAL samples : sample_array := (OTHERS => (OTHERS => '0'));
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SIGNAL sum : signed(TDATA_WIDTH + FILTER_ORDER_POWER - 1 DOWNTO 0) := (OTHERS => '0');
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SIGNAL sample_count : INTEGER RANGE 0 TO FILTER_ORDER := 0;
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SIGNAL m_axis_tvalid_int : STD_LOGIC := '0';
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BEGIN
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-- Output assignments
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m_axis_tvalid <= m_axis_tvalid_int;
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s_axis_tready <= m_axis_tready OR NOT m_axis_tvalid_int;
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PROCESS (aclk)
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VARIABLE new_sum : signed(TDATA_WIDTH + FILTER_ORDER_POWER - 1 DOWNTO 0);
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VARIABLE oldest_sample : signed(TDATA_WIDTH - 1 DOWNTO 0);
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VARIABLE avg : signed(TDATA_WIDTH - 1 DOWNTO 0);
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VARIABLE wr_ptr : INTEGER RANGE 0 TO FILTER_ORDER - 1 := 0;
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BEGIN
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IF rising_edge(aclk) THEN
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IF aresetn = '0' THEN
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samples <= (OTHERS => (OTHERS => '0'));
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sum <= (OTHERS => '0');
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sample_count <= 0;
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m_axis_tvalid_int <= '0';
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m_axis_tlast <= '0';
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m_axis_tdata <= (OTHERS => '0');
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wr_ptr := 0;
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ELSE
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m_axis_tvalid_int <= '0';
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m_axis_tlast <= '0';
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IF s_axis_tvalid = '1' AND (m_axis_tready = '1' OR m_axis_tvalid_int = '0') THEN
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-- Circular buffer
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oldest_sample := samples(wr_ptr);
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samples(wr_ptr) <= signed(s_axis_tdata);
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wr_ptr := (wr_ptr + 1) MOD FILTER_ORDER;
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-- Aggiorna la somma
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new_sum := sum - oldest_sample + signed(s_axis_tdata);
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sum <= new_sum;
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-- Aggiorna il conteggio solo fino a 32
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IF sample_count < FILTER_ORDER THEN
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sample_count <= sample_count + 1;
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END IF;
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-- Calcola la media sempre su 32 (anche se sample_count < 32)
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avg := new_sum(TDATA_WIDTH + FILTER_ORDER_POWER - 1 DOWNTO FILTER_ORDER_POWER);
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m_axis_tdata <= STD_LOGIC_VECTOR(avg);
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m_axis_tvalid_int <= '1';
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m_axis_tlast <= s_axis_tlast;
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END IF;
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END IF;
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END IF;
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END PROCESS;
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END Behavioral;
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@@ -1,34 +1,148 @@
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library IEEE;
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use IEEE.STD_LOGIC_1164.ALL;
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use ieee.numeric_std.all;
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LIBRARY IEEE;
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USE IEEE.STD_LOGIC_1164.ALL;
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USE ieee.numeric_std.ALL;
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entity moving_average_filter_en is
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generic (
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ENTITY moving_average_filter_en IS
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GENERIC (
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-- Filter order expressed as 2^(FILTER_ORDER_POWER)
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FILTER_ORDER_POWER : integer := 5;
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FILTER_ORDER_POWER : INTEGER := 5;
|
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TDATA_WIDTH : positive := 24
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TDATA_WIDTH : POSITIVE := 24
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);
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Port (
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aclk : in std_logic;
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aresetn : in std_logic;
|
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PORT (
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aclk : IN STD_LOGIC;
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aresetn : IN STD_LOGIC;
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s_axis_tvalid : in std_logic;
|
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s_axis_tdata : in std_logic_vector(TDATA_WIDTH-1 downto 0);
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s_axis_tlast : in std_logic;
|
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s_axis_tready : out std_logic;
|
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s_axis_tvalid : IN STD_LOGIC;
|
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s_axis_tdata : IN STD_LOGIC_VECTOR(TDATA_WIDTH - 1 DOWNTO 0);
|
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s_axis_tlast : IN STD_LOGIC;
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s_axis_tready : OUT STD_LOGIC;
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m_axis_tvalid : out std_logic;
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m_axis_tdata : out std_logic_vector(TDATA_WIDTH-1 downto 0);
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m_axis_tlast : out std_logic;
|
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m_axis_tready : in std_logic;
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m_axis_tvalid : OUT STD_LOGIC;
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m_axis_tdata : OUT STD_LOGIC_VECTOR(TDATA_WIDTH - 1 DOWNTO 0);
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m_axis_tlast : OUT STD_LOGIC;
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m_axis_tready : IN STD_LOGIC;
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enable_filter : in std_logic
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enable_filter : IN STD_LOGIC
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);
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end moving_average_filter_en;
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END moving_average_filter_en;
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architecture Behavioral of moving_average_filter_en is
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ARCHITECTURE Behavioral OF moving_average_filter_en IS
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begin
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-- Component declarations
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COMPONENT all_pass_filter IS
|
||||
GENERIC (
|
||||
TDATA_WIDTH : POSITIVE := 24
|
||||
);
|
||||
PORT (
|
||||
aclk : IN STD_LOGIC;
|
||||
aresetn : IN STD_LOGIC;
|
||||
|
||||
end Behavioral;
|
||||
s_axis_tvalid : IN STD_LOGIC;
|
||||
s_axis_tdata : IN STD_LOGIC_VECTOR(TDATA_WIDTH - 1 DOWNTO 0);
|
||||
s_axis_tlast : IN STD_LOGIC;
|
||||
s_axis_tready : OUT STD_LOGIC;
|
||||
|
||||
m_axis_tvalid : OUT STD_LOGIC;
|
||||
m_axis_tdata : OUT STD_LOGIC_VECTOR(TDATA_WIDTH - 1 DOWNTO 0);
|
||||
m_axis_tlast : OUT STD_LOGIC;
|
||||
m_axis_tready : IN STD_LOGIC
|
||||
);
|
||||
END COMPONENT;
|
||||
|
||||
COMPONENT moving_average_filter IS
|
||||
GENERIC (
|
||||
FILTER_ORDER_POWER : INTEGER := 5;
|
||||
TDATA_WIDTH : POSITIVE := 24
|
||||
);
|
||||
PORT (
|
||||
aclk : IN STD_LOGIC;
|
||||
aresetn : IN STD_LOGIC;
|
||||
|
||||
s_axis_tvalid : IN STD_LOGIC;
|
||||
s_axis_tdata : IN STD_LOGIC_VECTOR(TDATA_WIDTH - 1 DOWNTO 0);
|
||||
s_axis_tlast : IN STD_LOGIC;
|
||||
s_axis_tready : OUT STD_LOGIC;
|
||||
|
||||
m_axis_tvalid : OUT STD_LOGIC;
|
||||
m_axis_tdata : OUT STD_LOGIC_VECTOR(TDATA_WIDTH - 1 DOWNTO 0);
|
||||
m_axis_tlast : OUT STD_LOGIC;
|
||||
m_axis_tready : IN STD_LOGIC
|
||||
);
|
||||
END COMPONENT;
|
||||
|
||||
-- Internal signals for the all-pass filter
|
||||
SIGNAL all_pass_s_tvalid : STD_LOGIC;
|
||||
SIGNAL all_pass_s_tready : STD_LOGIC;
|
||||
|
||||
SIGNAL all_pass_m_tvalid : STD_LOGIC;
|
||||
SIGNAL all_pass_m_tdata : STD_LOGIC_VECTOR(TDATA_WIDTH - 1 DOWNTO 0);
|
||||
SIGNAL all_pass_m_tlast : STD_LOGIC;
|
||||
SIGNAL all_pass_m_tready : STD_LOGIC;
|
||||
|
||||
-- Internal signals for the moving average filter
|
||||
SIGNAL moving_avg_s_tvalid : STD_LOGIC;
|
||||
SIGNAL moving_avg_s_tready : STD_LOGIC;
|
||||
|
||||
SIGNAL moving_avg_m_tvalid : STD_LOGIC;
|
||||
SIGNAL moving_avg_m_tdata : STD_LOGIC_VECTOR(TDATA_WIDTH - 1 DOWNTO 0);
|
||||
SIGNAL moving_avg_m_tlast : STD_LOGIC;
|
||||
SIGNAL moving_avg_m_tready : STD_LOGIC;
|
||||
|
||||
BEGIN
|
||||
|
||||
-- Instantiate the all-pass filter
|
||||
all_pass_inst : all_pass_filter
|
||||
GENERIC MAP(
|
||||
TDATA_WIDTH => TDATA_WIDTH
|
||||
)
|
||||
PORT MAP(
|
||||
aclk => aclk,
|
||||
aresetn => aresetn,
|
||||
|
||||
s_axis_tvalid => all_pass_s_tvalid,
|
||||
s_axis_tdata => s_axis_tdata,
|
||||
s_axis_tlast => s_axis_tlast,
|
||||
s_axis_tready => all_pass_s_tready,
|
||||
|
||||
m_axis_tvalid => all_pass_m_tvalid,
|
||||
m_axis_tdata => all_pass_m_tdata,
|
||||
m_axis_tlast => all_pass_m_tlast,
|
||||
m_axis_tready => all_pass_m_tready
|
||||
);
|
||||
|
||||
-- Instantiate the moving average filter
|
||||
moving_avg_inst : moving_average_filter
|
||||
GENERIC MAP(
|
||||
FILTER_ORDER_POWER => FILTER_ORDER_POWER,
|
||||
TDATA_WIDTH => TDATA_WIDTH
|
||||
)
|
||||
PORT MAP(
|
||||
aclk => aclk,
|
||||
aresetn => aresetn,
|
||||
|
||||
s_axis_tvalid => moving_avg_s_tvalid,
|
||||
s_axis_tdata => s_axis_tdata,
|
||||
s_axis_tlast => s_axis_tlast,
|
||||
s_axis_tready => moving_avg_s_tready,
|
||||
|
||||
m_axis_tvalid => moving_avg_m_tvalid,
|
||||
m_axis_tdata => moving_avg_m_tdata,
|
||||
m_axis_tlast => moving_avg_m_tlast,
|
||||
m_axis_tready => moving_avg_m_tready
|
||||
);
|
||||
|
||||
-- Assign filter control signals based on enable_filter
|
||||
all_pass_s_tvalid <= s_axis_tvalid WHEN enable_filter = '0' ELSE '0';
|
||||
moving_avg_s_tvalid <= s_axis_tvalid WHEN enable_filter = '1' ELSE '0';
|
||||
|
||||
all_pass_m_tready <= m_axis_tready WHEN enable_filter = '0' ELSE '0';
|
||||
moving_avg_m_tready <= m_axis_tready WHEN enable_filter = '1' ELSE '0';
|
||||
|
||||
-- Main AXIS assignments based on enable_filter
|
||||
s_axis_tready <= all_pass_s_tready WHEN enable_filter = '0' ELSE moving_avg_s_tready;
|
||||
m_axis_tvalid <= all_pass_m_tvalid WHEN enable_filter = '0' ELSE moving_avg_m_tvalid;
|
||||
m_axis_tdata <= all_pass_m_tdata WHEN enable_filter = '0' ELSE moving_avg_m_tdata;
|
||||
m_axis_tlast <= all_pass_m_tlast WHEN enable_filter = '0' ELSE moving_avg_m_tlast;
|
||||
|
||||
END Behavioral;
|
||||
Reference in New Issue
Block a user