PickleRick/DESD
1
0
Fork 0
Code Issues 2 Pull Requests Releases Activity

Lab 3: Audio Processing System #3

Merged
PickleRick merged 43 commits from LAB3 into main 2025-06-07 22:18:48 +02:00
Conversation 1 Commits 43 Files Changed 45 +302 -338
5 changed files with 302 additions and 338 deletions
Download Patch File Download Diff File Expand all files Collapse all files
Showing only changes of commit 6ab3f7bcde - Show all commits

1
.gitignore vendored
View File

@@ -43,6 +43,7 @@
*.wdf *.wdf
*.lpr *.lpr
*.bxml *.bxml
*.zip
# Vivado project directories # Vivado project directories

432
LAB3/design/lab_3/lab_3.bd
View File

@@ -18,7 +18,6 @@
"axis_broadcaster_0": "", "axis_broadcaster_0": "",
"moving_average_filte_0": "", "moving_average_filte_0": "",
"volume_controller_0": "", "volume_controller_0": "",
"LFO_0": "",
"balance_controller_0": "", "balance_controller_0": "",
"effect_selector_0": "", "effect_selector_0": "",
"led_controller_0": "", "led_controller_0": "",
@@ -26,7 +25,8 @@
"mute_controller_0": "", "mute_controller_0": "",
"axi4stream_spi_master_0": "", "axi4stream_spi_master_0": "",
"axis_dual_i2s_0": "", "axis_dual_i2s_0": "",
"digilent_jstk2_0": "" "digilent_jstk2_0": "",
"LFO_0": ""
}, },
"interface_ports": { "interface_ports": {
"SPI_M_0": { "SPI_M_0": {
@@ -720,210 +720,6 @@
} }
} }
}, },
"LFO_0": {
"vlnv": "xilinx.com:module_ref:LFO:1.0",
"xci_name": "lab_3_LFO_0_0",
"xci_path": "ip\\lab_3_LFO_0_0\\lab_3_LFO_0_0.xci",
"inst_hier_path": "LFO_0",
"parameters": {
"CLK_PERIOD_NS": {
"value": "10"
}
},
"reference_info": {
"ref_type": "hdl",
"ref_name": "LFO",
"boundary_crc": "0x0"
},
"interface_ports": {
"m_axis": {
"mode": "Master",
"vlnv": "xilinx.com:interface:axis_rtl:1.0",
"parameters": {
"TDATA_NUM_BYTES": {
"value": "3",
"value_src": "auto"
},
"TDEST_WIDTH": {
"value": "0",
"value_src": "constant"
},
"TID_WIDTH": {
"value": "0",
"value_src": "constant"
},
"TUSER_WIDTH": {
"value": "0",
"value_src": "constant"
},
"HAS_TREADY": {
"value": "1",
"value_src": "constant"
},
"HAS_TSTRB": {
"value": "0",
"value_src": "constant"
},
"HAS_TKEEP": {
"value": "0",
"value_src": "constant"
},
"HAS_TLAST": {
"value": "1",
"value_src": "constant"
},
"FREQ_HZ": {
"value": "100000000",
"value_src": "ip_prop"
},
"PHASE": {
"value": "0.0",
"value_src": "ip_prop"
},
"CLK_DOMAIN": {
"value": "/clk_wiz_0_clk_out1",
"value_src": "ip_prop"
}
},
"port_maps": {
"TDATA": {
"physical_name": "m_axis_tdata",
"direction": "O",
"left": "23",
"right": "0"
},
"TLAST": {
"physical_name": "m_axis_tlast",
"direction": "O"
},
"TVALID": {
"physical_name": "m_axis_tvalid",
"direction": "O"
},
"TREADY": {
"physical_name": "m_axis_tready",
"direction": "I"
}
}
},
"s_axis": {
"mode": "Slave",
"vlnv": "xilinx.com:interface:axis_rtl:1.0",
"parameters": {
"TDATA_NUM_BYTES": {
"value": "3",
"value_src": "auto"
},
"TDEST_WIDTH": {
"value": "0",
"value_src": "constant"
},
"TID_WIDTH": {
"value": "0",
"value_src": "constant"
},
"TUSER_WIDTH": {
"value": "0",
"value_src": "constant"
},
"HAS_TREADY": {
"value": "1",
"value_src": "constant"
},
"HAS_TSTRB": {
"value": "0",
"value_src": "constant"
},
"HAS_TKEEP": {
"value": "0",
"value_src": "constant"
},
"HAS_TLAST": {
"value": "1",
"value_src": "constant"
},
"FREQ_HZ": {
"value": "100000000",
"value_src": "ip_prop"
},
"PHASE": {
"value": "0.0",
"value_src": "ip_prop"
},
"CLK_DOMAIN": {
"value": "/clk_wiz_0_clk_out1",
"value_src": "ip_prop"
}
},
"port_maps": {
"TDATA": {
"physical_name": "s_axis_tdata",
"direction": "I",
"left": "23",
"right": "0"
},
"TLAST": {
"physical_name": "s_axis_tlast",
"direction": "I"
},
"TVALID": {
"physical_name": "s_axis_tvalid",
"direction": "I"
},
"TREADY": {
"physical_name": "s_axis_tready",
"direction": "O"
}
}
}
},
"ports": {
"aclk": {
"type": "clk",
"direction": "I",
"parameters": {
"ASSOCIATED_BUSIF": {
"value": "m_axis:s_axis",
"value_src": "constant"
},
"ASSOCIATED_RESET": {
"value": "aresetn",
"value_src": "constant"
},
"FREQ_HZ": {
"value": "100000000",
"value_src": "ip_prop"
},
"PHASE": {
"value": "0.0",
"value_src": "ip_prop"
},
"CLK_DOMAIN": {
"value": "/clk_wiz_0_clk_out1",
"value_src": "ip_prop"
}
}
},
"aresetn": {
"type": "rst",
"direction": "I",
"parameters": {
"POLARITY": {
"value": "ACTIVE_LOW",
"value_src": "constant"
}
}
},
"lfo_period": {
"direction": "I",
"left": "9",
"right": "0"
},
"lfo_enable": {
"direction": "I"
}
}
},
"balance_controller_0": { "balance_controller_0": {
"vlnv": "xilinx.com:module_ref:balance_controller:1.0", "vlnv": "xilinx.com:module_ref:balance_controller:1.0",
"xci_name": "lab_3_balance_controller_0_0", "xci_name": "lab_3_balance_controller_0_0",
@@ -1750,19 +1546,181 @@
"right": "0" "right": "0"
} }
} }
},
"LFO_0": {
"vlnv": "xilinx.com:module_ref:LFO:1.0",
"xci_name": "lab_3_LFO_0_0",
"xci_path": "ip\\lab_3_LFO_0_0\\lab_3_LFO_0_0.xci",
"inst_hier_path": "LFO_0",
"parameters": {
"CLK_PERIOD_NS": {
"value": "10"
}
},
"reference_info": {
"ref_type": "hdl",
"ref_name": "LFO",
"boundary_crc": "0x0"
},
"interface_ports": {
"m_axis": {
"mode": "Master",
"vlnv": "xilinx.com:interface:axis_rtl:1.0",
"parameters": {
"TDATA_NUM_BYTES": {
"value": "3",
"value_src": "auto"
},
"TDEST_WIDTH": {
"value": "0",
"value_src": "constant"
},
"TID_WIDTH": {
"value": "0",
"value_src": "constant"
},
"TUSER_WIDTH": {
"value": "0",
"value_src": "constant"
},
"HAS_TREADY": {
"value": "1",
"value_src": "constant"
},
"HAS_TSTRB": {
"value": "0",
"value_src": "constant"
},
"HAS_TKEEP": {
"value": "0",
"value_src": "constant"
},
"HAS_TLAST": {
"value": "1",
"value_src": "constant"
}
},
"port_maps": {
"TDATA": {
"physical_name": "m_axis_tdata",
"direction": "O",
"left": "23",
"right": "0"
},
"TLAST": {
"physical_name": "m_axis_tlast",
"direction": "O"
},
"TVALID": {
"physical_name": "m_axis_tvalid",
"direction": "O"
},
"TREADY": {
"physical_name": "m_axis_tready",
"direction": "I"
}
}
},
"s_axis": {
"mode": "Slave",
"vlnv": "xilinx.com:interface:axis_rtl:1.0",
"parameters": {
"TDATA_NUM_BYTES": {
"value": "3",
"value_src": "auto"
},
"TDEST_WIDTH": {
"value": "0",
"value_src": "constant"
},
"TID_WIDTH": {
"value": "0",
"value_src": "constant"
},
"TUSER_WIDTH": {
"value": "0",
"value_src": "constant"
},
"HAS_TREADY": {
"value": "1",
"value_src": "constant"
},
"HAS_TSTRB": {
"value": "0",
"value_src": "constant"
},
"HAS_TKEEP": {
"value": "0",
"value_src": "constant"
},
"HAS_TLAST": {
"value": "1",
"value_src": "constant"
}
},
"port_maps": {
"TDATA": {
"physical_name": "s_axis_tdata",
"direction": "I",
"left": "23",
"right": "0"
},
"TLAST": {
"physical_name": "s_axis_tlast",
"direction": "I"
},
"TVALID": {
"physical_name": "s_axis_tvalid",
"direction": "I"
},
"TREADY": {
"physical_name": "s_axis_tready",
"direction": "O"
}
}
}
},
"ports": {
"aclk": {
"type": "clk",
"direction": "I",
"parameters": {
"ASSOCIATED_BUSIF": {
"value": "m_axis:s_axis",
"value_src": "constant"
},
"ASSOCIATED_RESET": {
"value": "aresetn",
"value_src": "constant"
}
}
},
"aresetn": {
"type": "rst",
"direction": "I",
"parameters": {
"POLARITY": {
"value": "ACTIVE_LOW",
"value_src": "constant"
}
}
},
"lfo_period": {
"direction": "I",
"left": "9",
"right": "0"
},
"lfo_enable": {
"direction": "I"
}
}
} }
}, },
"interface_nets": { "interface_nets": {
"axis_dual_i2s_0_m_axis": { "axi4stream_spi_master_0_M_AXIS": {
"interface_ports": [ "interface_ports": [
"axis_dual_i2s_0/m_axis", "axi4stream_spi_master_0/M_AXIS",
"moving_average_filte_0/s_axis" "digilent_jstk2_0/s_axis"
]
},
"LFO_0_m_axis": {
"interface_ports": [
"LFO_0/m_axis",
"mute_controller_0/s_axis"
] ]
}, },
"digilent_jstk2_0_m_axis": { "digilent_jstk2_0_m_axis": {
@@ -1777,6 +1735,18 @@
"axi4stream_spi_master_0/SPI_M" "axi4stream_spi_master_0/SPI_M"
] ]
}, },
"axis_broadcaster_0_M01_AXIS": {
"interface_ports": [
"axis_broadcaster_0/M01_AXIS",
"led_level_controller_0/s_axis"
]
},
"LFO_0_m_axis": {
"interface_ports": [
"LFO_0/m_axis",
"mute_controller_0/s_axis"
]
},
"volume_controller_0_m_axis": { "volume_controller_0_m_axis": {
"interface_ports": [ "interface_ports": [
"volume_controller_0/m_axis", "volume_controller_0/m_axis",
@@ -1789,28 +1759,16 @@
"axis_dual_i2s_0/s_axis" "axis_dual_i2s_0/s_axis"
] ]
}, },
"axi4stream_spi_master_0_M_AXIS": {
"interface_ports": [
"axi4stream_spi_master_0/M_AXIS",
"digilent_jstk2_0/s_axis"
]
},
"balance_controller_0_m_axis": { "balance_controller_0_m_axis": {
"interface_ports": [ "interface_ports": [
"balance_controller_0/m_axis", "balance_controller_0/m_axis",
"volume_controller_0/s_axis" "volume_controller_0/s_axis"
] ]
}, },
"mute_controller_0_m_axis": { "axis_dual_i2s_0_m_axis": {
"interface_ports": [ "interface_ports": [
"mute_controller_0/m_axis", "axis_dual_i2s_0/m_axis",
"axis_broadcaster_0/S_AXIS" "moving_average_filte_0/s_axis"
]
},
"axis_broadcaster_0_M01_AXIS": {
"interface_ports": [
"axis_broadcaster_0/M01_AXIS",
"led_level_controller_0/s_axis"
] ]
}, },
"moving_average_filte_0_m_axis": { "moving_average_filte_0_m_axis": {
@@ -1818,6 +1776,12 @@
"balance_controller_0/s_axis", "balance_controller_0/s_axis",
"moving_average_filte_0/m_axis" "moving_average_filte_0/m_axis"
] ]
},
"mute_controller_0_m_axis": {
"interface_ports": [
"mute_controller_0/m_axis",
"axis_broadcaster_0/S_AXIS"
]
} }
}, },
"nets": { "nets": {
@@ -1837,14 +1801,14 @@
"axis_broadcaster_0/aclk", "axis_broadcaster_0/aclk",
"moving_average_filte_0/aclk", "moving_average_filte_0/aclk",
"volume_controller_0/aclk", "volume_controller_0/aclk",
"LFO_0/aclk",
"balance_controller_0/aclk", "balance_controller_0/aclk",
"effect_selector_0/aclk", "effect_selector_0/aclk",
"led_level_controller_0/aclk", "led_level_controller_0/aclk",
"mute_controller_0/aclk", "mute_controller_0/aclk",
"axi4stream_spi_master_0/aclk", "axi4stream_spi_master_0/aclk",
"axis_dual_i2s_0/aclk", "axis_dual_i2s_0/aclk",
"digilent_jstk2_0/aclk" "digilent_jstk2_0/aclk",
"LFO_0/aclk"
] ]
}, },
"reset_1": { "reset_1": {
@@ -1876,14 +1840,14 @@
"axis_broadcaster_0/aresetn", "axis_broadcaster_0/aresetn",
"moving_average_filte_0/aresetn", "moving_average_filte_0/aresetn",
"volume_controller_0/aresetn", "volume_controller_0/aresetn",
"LFO_0/aresetn",
"balance_controller_0/aresetn", "balance_controller_0/aresetn",
"effect_selector_0/aresetn", "effect_selector_0/aresetn",
"led_level_controller_0/aresetn", "led_level_controller_0/aresetn",
"mute_controller_0/aresetn", "mute_controller_0/aresetn",
"axi4stream_spi_master_0/aresetn", "axi4stream_spi_master_0/aresetn",
"axis_dual_i2s_0/aresetn", "axis_dual_i2s_0/aresetn",
"digilent_jstk2_0/aresetn" "digilent_jstk2_0/aresetn",
"LFO_0/aresetn"
] ]
}, },
"proc_sys_reset_1_peripheral_aresetn": { "proc_sys_reset_1_peripheral_aresetn": {

22
LAB3/design/lab_3/lab_3.bda
View File

@@ -21,22 +21,22 @@
<key attr.name="vert_type" attr.type="string" for="node" id="VT"/> <key attr.name="vert_type" attr.type="string" for="node" id="VT"/>
<graph edgedefault="undirected" id="G" parse.edgeids="canonical" parse.nodeids="canonical" parse.order="nodesfirst"> <graph edgedefault="undirected" id="G" parse.edgeids="canonical" parse.nodeids="canonical" parse.order="nodesfirst">
<node id="n0"> <node id="n0">
<data key="VM">lab_3</data>
<data key="VT">BC</data>
</node>
<node id="n1">
<data key="VH">2</data>
<data key="VM">lab_3</data>
<data key="VT">VR</data>
</node>
<node id="n2">
<data key="TU">active</data> <data key="TU">active</data>
<data key="VH">2</data> <data key="VH">2</data>
<data key="VT">PM</data> <data key="VT">PM</data>
</node> </node>
<edge id="e0" source="n0" target="n1"> <node id="n1">
<data key="VM">lab_3</data>
<data key="VT">BC</data>
</node>
<node id="n2">
<data key="VH">2</data>
<data key="VM">lab_3</data>
<data key="VT">VR</data>
</node>
<edge id="e0" source="n1" target="n2">
</edge> </edge>
<edge id="e1" source="n1" target="n2"> <edge id="e1" source="n2" target="n0">
</edge> </edge>
</graph> </graph>
</graphml> </graphml>

147
LAB3/src/LFO.vhd
View File

@@ -35,33 +35,33 @@ END ENTITY LFO;
ARCHITECTURE Behavioral OF LFO IS ARCHITECTURE Behavioral OF LFO IS
CONSTANT LFO_COUNTER_BASE_PERIOD_NS : INTEGER := 100000; CONSTANT LFO_COUNTER_BASE_PERIOD_US : INTEGER := 1000; -- 1ms
CONSTANT ADJUSTMENT_FACTOR : INTEGER := 90; CONSTANT ADJUSTMENT_FACTOR : INTEGER := 90;
CONSTANT JSTK_CENTER_VALUE : INTEGER := 2 ** (JOYSTICK_LENGHT - 1);
constant LFO_COUNTER_BASE_CLK_CYCLES : INTEGER := LFO_COUNTER_BASE_PERIOD_US * 1000 / CLK_PERIOD_NS;
SIGNAL step_clk_cycles : INTEGER := LFO_COUNTER_BASE_CLK_CYCLES;
SIGNAL step_counter : INTEGER := 1; SIGNAL step_counter : INTEGER := 1;
SIGNAL tri_counter : signed(CHANNEL_LENGHT - 1 DOWNTO 0) := (OTHERS => '0'); SIGNAL tri_counter : signed(TRIANGULAR_COUNTER_LENGHT - 1 DOWNTO 0) := (OTHERS => '0');
SIGNAL direction_up : STD_LOGIC := '1'; SIGNAL direction_up : STD_LOGIC := '1';
SIGNAL lfo_tick : STD_LOGIC := '0'; SIGNAL lfo_product : STD_LOGIC_VECTOR(CHANNEL_LENGHT + TRIANGULAR_COUNTER_LENGHT - 1 DOWNTO 0) := (OTHERS => '0');
SIGNAL lfo_period_int : INTEGER := LFO_COUNTER_BASE_PERIOD_NS; SIGNAL trigger : STD_LOGIC := '0';
SIGNAL m_axis_tvalid_i : STD_LOGIC := '0';
SIGNAL m_axis_tdata_i : STD_LOGIC_VECTOR(CHANNEL_LENGHT - 1 DOWNTO 0) := (OTHERS => '0'); SIGNAL s_axis_tready_int : STD_LOGIC := '0';
SIGNAL m_axis_tlast_i : STD_LOGIC := '0'; SIGNAL m_axis_tvalid_int : STD_LOGIC := '0';
SIGNAL s_axis_tready_i : STD_LOGIC := '1';
SIGNAL temp : STD_LOGIC_VECTOR(CHANNEL_LENGHT + TRIANGULAR_COUNTER_LENGHT - 1 DOWNTO 0) := (OTHERS => '0');
BEGIN BEGIN
-- Output assignments -- Output assignments
s_axis_tready <= s_axis_tready_i; s_axis_tready <= s_axis_tready_int;
m_axis_tdata <= m_axis_tdata_i; m_axis_tvalid <= m_axis_tvalid_int;
m_axis_tvalid <= m_axis_tvalid_i;
m_axis_tlast <= m_axis_tlast_i;
-- LFO period adjustment process
PROCESS (aclk) PROCESS (aclk)
BEGIN BEGIN
IF rising_edge(aclk) THEN IF rising_edge(aclk) THEN
lfo_period_int <= LFO_COUNTER_BASE_PERIOD_NS - ADJUSTMENT_FACTOR * to_integer(unsigned(lfo_period)); step_clk_cycles <= LFO_COUNTER_BASE_CLK_CYCLES - ADJUSTMENT_FACTOR * to_integer(JSTK_CENTER_VALUE - unsigned(lfo_period));
END IF; END IF;
END PROCESS; END PROCESS;
@@ -69,95 +69,96 @@ BEGIN
PROCESS (aclk) PROCESS (aclk)
BEGIN BEGIN
IF rising_edge(aclk) THEN IF rising_edge(aclk) THEN
IF aresetn = '0' THEN IF aresetn = '0' THEN
step_counter <= 0; step_counter <= 0;
tri_counter <= (OTHERS => '0'); tri_counter <= (OTHERS => '0');
direction_up <= '1'; direction_up <= '1';
lfo_tick <= '0';
ELSIF lfo_enable = '1' THEN ELSE
IF step_counter < lfo_period_int THEN IF lfo_enable = '1' THEN
step_counter <= step_counter + 1;
lfo_tick <= '0';
ELSE IF step_counter < step_clk_cycles THEN
step_counter <= 0; step_counter <= step_counter + 1;
lfo_tick <= '1';
IF direction_up = '1' THEN
IF tri_counter = 2 ** TRIANGULAR_COUNTER_LENGHT - 1 THEN
direction_up <= '0';
tri_counter <= tri_counter - 1;
ELSE
tri_counter <= tri_counter + 1;
END IF;
ELSE ELSE
IF tri_counter = 0 THEN step_counter <= 0;
direction_up <= '1';
tri_counter <= tri_counter + 1; IF direction_up = '1' THEN
IF tri_counter = 2 ** TRIANGULAR_COUNTER_LENGHT - 1 THEN
direction_up <= '0';
tri_counter <= tri_counter - 1;
ELSE
tri_counter <= tri_counter + 1;
END IF;
ELSE ELSE
tri_counter <= tri_counter - 1; IF tri_counter = 0 THEN
direction_up <= '1';
tri_counter <= tri_counter + 1;
ELSE
tri_counter <= tri_counter - 1;
END IF;
END IF; END IF;
END IF; END IF;
END IF; END IF;
ELSE
lfo_tick <= '0';
direction_up <= '1';
tri_counter <= (OTHERS => '0');
step_counter <= 0;
END IF; END IF;
END IF; END IF;
END PROCESS; END PROCESS;
-- Handshake logic for the AXIS interface
PROCESS (aclk) PROCESS (aclk)
BEGIN BEGIN
IF rising_edge(aclk) THEN IF rising_edge(aclk) THEN
IF aresetn = '0' THEN
temp <= (OTHERS => '0');
ELSIF s_axis_tvalid = '1' AND m_axis_tready = '1' AND lfo_enable = '1' THEN
temp <= STD_LOGIC_VECTOR(
resize(
signed(s_axis_tdata) * signed(resize(tri_counter, s_axis_tdata'length)),
temp'length
)
);
END IF;
END IF;
END PROCESS;
PROCESS (aclk)
BEGIN
IF rising_edge(aclk) THEN
IF aresetn = '0' THEN IF aresetn = '0' THEN
m_axis_tvalid_i <= '0'; s_axis_tready_int <= '0';
m_axis_tdata_i <= (OTHERS => '0'); m_axis_tvalid_int <= '0';
m_axis_tlast_i <= '0'; m_axis_tdata <= (OTHERS => '0');
m_axis_tlast <= '0';
ELSE ELSE
IF s_axis_tvalid = '1' AND m_axis_tready = '1' THEN -- Set the ready signal for the slave interface
s_axis_tready_int <= m_axis_tready OR NOT m_axis_tvalid_int;
-- Clear valid flag when master interface is ready
IF m_axis_tready = '1' THEN
m_axis_tvalid_int <= '0';
END IF;
IF trigger = '1' AND (m_axis_tvalid_int = '0' OR m_axis_tready = '1') THEN
m_axis_tvalid_int <= '1';
m_axis_tlast <= s_axis_tlast;
m_axis_tdata <= lfo_product(CHANNEL_LENGHT + TRIANGULAR_COUNTER_LENGHT - 1 DOWNTO TRIANGULAR_COUNTER_LENGHT);
trigger <= '0';
END IF;
-- Handle input data
IF s_axis_tvalid = '1' AND s_axis_tready_int = '1' THEN
IF lfo_enable = '1' THEN IF lfo_enable = '1' THEN
m_axis_tdata_i <= temp(temp'high DOWNTO temp'high - (CHANNEL_LENGHT - 1)); lfo_product <= STD_LOGIC_VECTOR(
signed(s_axis_tdata) * tri_counter
);
ELSE ELSE
m_axis_tdata_i <= s_axis_tdata; lfo_product <= s_axis_tdata;
END IF; END IF;
s_axis_tready_i <= '0';
m_axis_tvalid_i <= '1'; trigger <= '1';
m_axis_tlast_i <= s_axis_tlast;
END IF;
IF m_axis_tvalid_i = '1' THEN
IF m_axis_tready = '0' THEN
s_axis_tready_i <= '0';
ELSE
s_axis_tready_i <= '1';
END IF;
m_axis_tvalid_i <= '0';
END IF; END IF;
END IF; END IF;
END IF; END IF;
END PROCESS; END PROCESS;
END ARCHITECTURE Behavioral; END ARCHITECTURE Behavioral;

38
LAB3/vivado/lab3/lab3.xpr
View File

@@ -77,12 +77,6 @@
<FileSets Version="1" Minor="31"> <FileSets Version="1" Minor="31">
<FileSet Name="sources_1" Type="DesignSrcs" RelSrcDir="$PSRCDIR/sources_1" RelGenDir="$PGENDIR/sources_1"> <FileSet Name="sources_1" Type="DesignSrcs" RelSrcDir="$PSRCDIR/sources_1" RelGenDir="$PGENDIR/sources_1">
<Filter Type="Srcs"/> <Filter Type="Srcs"/>
<File Path="$PPRDIR/../../src/digilent_jstk2.vhd">
<FileInfo>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<File Path="$PPRDIR/../../src/edge_detector_toggle.vhd"> <File Path="$PPRDIR/../../src/edge_detector_toggle.vhd">
<FileInfo> <FileInfo>
<Attr Name="UsedIn" Val="synthesis"/> <Attr Name="UsedIn" Val="synthesis"/>
@@ -95,6 +89,18 @@
<Attr Name="UsedIn" Val="simulation"/> <Attr Name="UsedIn" Val="simulation"/>
</FileInfo> </FileInfo>
</File> </File>
<File Path="$PPRDIR/../../src/all_pass_filter.vhd">
<FileInfo>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<File Path="$PPRDIR/../../src/moving_average_filter.vhd">
<FileInfo>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<File Path="$PPRDIR/../../src/moving_average_filter_en.vhd"> <File Path="$PPRDIR/../../src/moving_average_filter_en.vhd">
<FileInfo> <FileInfo>
<Attr Name="UsedIn" Val="synthesis"/> <Attr Name="UsedIn" Val="synthesis"/>
@@ -143,6 +149,12 @@
<Attr Name="UsedIn" Val="simulation"/> <Attr Name="UsedIn" Val="simulation"/>
</FileInfo> </FileInfo>
</File> </File>
<File Path="$PPRDIR/../../src/digilent_jstk2.vhd">
<FileInfo>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<File Path="$PPRDIR/../../design/lab_3/lab_3.bd"> <File Path="$PPRDIR/../../design/lab_3/lab_3.bd">
<FileInfo> <FileInfo>
<Attr Name="UsedIn" Val="synthesis"/> <Attr Name="UsedIn" Val="synthesis"/>
@@ -156,13 +168,6 @@
<Attr Name="UsedIn" Val="simulation"/> <Attr Name="UsedIn" Val="simulation"/>
</FileInfo> </FileInfo>
</File> </File>
<File Path="$PPRDIR/../../src/all_pass_filter.vhd">
<FileInfo>
<Attr Name="AutoDisabled" Val="1"/>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<File Path="$PPRDIR/../../src/jstk_uart_bridge.vhd"> <File Path="$PPRDIR/../../src/jstk_uart_bridge.vhd">
<FileInfo> <FileInfo>
<Attr Name="AutoDisabled" Val="1"/> <Attr Name="AutoDisabled" Val="1"/>
@@ -170,13 +175,6 @@
<Attr Name="UsedIn" Val="simulation"/> <Attr Name="UsedIn" Val="simulation"/>
</FileInfo> </FileInfo>
</File> </File>
<File Path="$PPRDIR/../../src/moving_average_filter.vhd">
<FileInfo>
<Attr Name="AutoDisabled" Val="1"/>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<File Path="$PPRDIR/../../src/volume_multiplier.vhd"> <File Path="$PPRDIR/../../src/volume_multiplier.vhd">
<FileInfo> <FileInfo>
<Attr Name="AutoDisabled" Val="1"/> <Attr Name="AutoDisabled" Val="1"/>