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PickleRick
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DESD
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aa8d8f3c7c9d0e50ec999360fd7d85ed5126bddd
DESD
/
LAB3
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Cd16d
aa8d8f3c7c
Refactor design files for LAB3: update diligent_jstk and add testbench for digilent_jstk2
2025-05-14 14:34:22 +02:00
..
cons
Add initial design files and project configuration for LAB3
2025-05-12 14:20:41 +02:00
design
Refactor design files for LAB3: update diligent_jstk and add testbench for digilent_jstk2
2025-05-14 14:34:22 +02:00
ip
Add AXI4-Stream UART IP and associated files
2025-05-12 18:16:58 +02:00
sim
Refactor design files for LAB3: update diligent_jstk and add testbench for digilent_jstk2
2025-05-14 14:34:22 +02:00
src
Refactor design files for LAB3: update diligent_jstk and add testbench for digilent_jstk2
2025-05-14 14:34:22 +02:00
test
Refactor design files for LAB3: update diligent_jstk and add testbench for digilent_jstk2
2025-05-14 14:34:22 +02:00
vivado
Refactor design files for LAB3: update diligent_jstk and add testbench for digilent_jstk2
2025-05-14 14:34:22 +02:00
