Add initial implementations for various audio processing components

- Created LFO entity for low-frequency oscillation control.
- Added all_pass_filter entity for signal processing.
- Implemented balance_controller for audio balance adjustments.
- Developed debouncer to stabilize input signals.
- Introduced digilent_jstk2 for joystick data handling.
- Added edge_detector_toggle for edge detection functionality.
- Created effect_selector to manage audio effects based on joystick input.
- Implemented jstk_uart_bridge for communication between joystick and UART.
- Developed led_controller for LED management.
- Introduced led_level_controller for controlling multiple LEDs.
- Created moving_average_filter for smoothing input signals.
- Added moving_average_filter_en with enable functionality.
- Implemented mute_controller to handle mute functionality.
- Developed volume_controller for volume adjustments.
- Introduced volume_multiplier for scaling audio signals.
- Created volume_saturator to ensure audio signals stay within bounds.

LAB3/src/digilent_jstk2.vhd

@@ -0,0 +1,49 @@
+library IEEE;
+use IEEE.STD_LOGIC_1164.ALL;
+
+entity digilent_jstk2 is
+	generic (
+		DELAY_US		: integer := 25;    -- Delay (in us) between two packets
+		CLKFREQ		 	: integer := 100_000_000;  -- Frequency of the aclk signal (in Hz)
+		SPI_SCLKFREQ 	: integer := 66_666 -- Frequency of the SPI SCLK clock signal (in Hz)
+	);
+	Port ( 
+		aclk 			: in  STD_LOGIC;
+		aresetn			: in  STD_LOGIC;
+
+		-- Data going TO the SPI IP-Core (and so, to the JSTK2 module)
+		m_axis_tvalid	: out STD_LOGIC;
+		m_axis_tdata	: out STD_LOGIC_VECTOR(7 downto 0);
+		m_axis_tready	: in STD_LOGIC;
+
+		-- Data coming FROM the SPI IP-Core (and so, from the JSTK2 module)
+		-- There is no tready signal, so you must be always ready to accept and use the incoming data, or it will be lost!
+		s_axis_tvalid	: in STD_LOGIC;
+		s_axis_tdata	: in STD_LOGIC_VECTOR(7 downto 0);
+
+		-- Joystick and button values read from the module
+		jstk_x			: out std_logic_vector(9 downto 0);
+		jstk_y			: out std_logic_vector(9 downto 0);
+		btn_jstk		: out std_logic;
+		btn_trigger		: out std_logic;
+
+		-- LED color to send to the module
+		led_r			: in std_logic_vector(7 downto 0);
+		led_g			: in std_logic_vector(7 downto 0);
+		led_b			: in std_logic_vector(7 downto 0)
+	);
+end digilent_jstk2;
+
+architecture Behavioral of digilent_jstk2 is
+
+	-- Code for the SetLEDRGB command, see the JSTK2 datasheet.
+	constant CMDSETLEDRGB		: std_logic_vector(7 downto 0) := x"84";
+
+	-- Do not forget that you MUST wait a bit between two packets. See the JSTK2 datasheet (and the SPI IP-Core README).
+	------------------------------------------------------------
+
+begin
+
+	-- ...
+
+end architecture;