PickleRick/DESD
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Update volume_multiplier testbench and adjust simulation settings; refactor balance_controller and effect_selector logic

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PickleRick committed 2025-05-23 11:12:07 +02:00
1 parent fd7bac0da1
commit d3dd458825
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+224 -38
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LAB3/sim/tb_volume_multiplier.vhd
+1 -1
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@@ -115,7 +115,7 @@ BEGIN
WAIT UNTIL rising_edge(aclk);
-- Set volume to mid (no gain/loss)
volume <= volume_mem(0);
volume <= volume_mem(7);
WAIT UNTIL rising_edge(aclk);
-- Send all samples