Update volume_multiplier testbench and adjust simulation settings; refactor balance_controller and effect_selector logic
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@@ -28,12 +28,15 @@ END volume_saturator;
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ARCHITECTURE Behavioral OF volume_saturator IS
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CONSTANT HIGHER_BOUND_VEC : STD_LOGIC_VECTOR(TDATA_WIDTH - 1 DOWNTO 0) := STD_LOGIC_VECTOR(to_signed(HIGHER_BOUND, TDATA_WIDTH));
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CONSTANT LOWER_BOUND_VEC : STD_LOGIC_VECTOR(TDATA_WIDTH - 1 DOWNTO 0) := STD_LOGIC_VECTOR(to_signed(LOWER_BOUND, TDATA_WIDTH));
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SIGNAL m_axis_tvalid_int : STD_LOGIC;
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BEGIN
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-- Output assignments
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m_axis_tvalid <= m_axis_tvalid_int;
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s_axis_tready <= m_axis_tready AND aresetn;
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s_axis_tready <= (m_axis_tready OR NOT m_axis_tvalid_int) AND aresetn;
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PROCESS (aclk)
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BEGIN
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@@ -43,9 +46,8 @@ BEGIN
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IF aresetn = '0' THEN
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m_axis_tvalid_int <= '0';
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m_axis_tlast <= '0';
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m_axis_tdata <= (OTHERS => '0');
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ELSE
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ELSE
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-- Clear valid flag when master interface is ready
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IF m_axis_tready = '1' THEN
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m_axis_tvalid_int <= '0';
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@@ -54,11 +56,11 @@ BEGIN
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-- Handle the data flow
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IF s_axis_tvalid = '1' AND m_axis_tready = '1' THEN
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-- Check if the input data is within the bounds else saturate
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IF signed(s_axis_tdata) > to_signed(HIGHER_BOUND, s_axis_tdata'length) THEN
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m_axis_tdata <= STD_LOGIC_VECTOR(to_signed(HIGHER_BOUND, TDATA_WIDTH));
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IF signed(s_axis_tdata) > signed(HIGHER_BOUND_VEC) THEN
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m_axis_tdata <= HIGHER_BOUND_VEC;
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ELSIF signed(s_axis_tdata) < to_signed(LOWER_BOUND, s_axis_tdata'length) THEN
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m_axis_tdata <= STD_LOGIC_VECTOR(to_signed(LOWER_BOUND, TDATA_WIDTH));
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ELSIF signed(s_axis_tdata) < signed(LOWER_BOUND_VEC) THEN
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m_axis_tdata <= LOWER_BOUND_VEC;
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ELSE
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m_axis_tdata <= STD_LOGIC_VECTOR(resize(signed(s_axis_tdata), TDATA_WIDTH));
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