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LAB2/Readme.md
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LAB2/Readme.md
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# LAB2 Project Presentation
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## Project Description
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The LAB2 project consists of the design and implementation of a digital system for image processing and data communication. The system is composed of several functional blocks, each responsible for a specific task in the processing pipeline. The main objectives are:
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- Receive and process image data
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- Perform color space conversion (e.g., RGB to grayscale)
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- Apply convolution filters to the image
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- Packetize the processed data for transmission
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- Support loopback and test modes for verification
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## Block Diagram
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Below is a conceptual block diagram of the LAB2 system:
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```mermaid
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flowchart LR
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IN[PC] -.-> UART[UART]
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UART -.-> IN
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UART --> DEPACK[Depack]
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DEPACK --> C2G[Color to Grayscale Converter]
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C2G --> BRAM[BRAM Writer]
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BRAM --> Underflow
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BRAM -->Overflow
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BRAM -->Ok
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BRAM <-.-> CONV[Convolution Filter]
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BRAM <-.-> CONV
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CONV --> PACK[Packetizer]
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PACK --> UART
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```
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## Areas for Improvement
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- In loopback mode, when sending an empty packet (FFF1), the module temporarily stores H and F and prepends them to the header of the next packet. There is an error in the pack/depack logic.
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- The implementation of the depacketizer is complex, and the precise error has not been identified.
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- The color conversion (C2G) uses a divider by 3, but the approximation method is unclear (it sums half of the power-of-two factor used in the divider—why?). -> Just add comments explainig how it works
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- Convolution is performed with various unconstrained integers.
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- In general, the VHDL code is somewhat complex, although generally correct. Aim to simplify and make the code more readable.
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LAB3/Readme.md
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LAB3/Readme.md
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# LAB3 Project Presentation
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## Project Description
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*To be completed: Add a description of the LAB3 project here.*
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## Block Diagram
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*To be completed: Add a block diagram of the LAB3 system here (e.g., using Mermaid or an image).*
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## Areas for Improvement
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- JSTK: Non-atomicity in writing to the RGB LED; the rest is well done and clear.
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- Mute: (IF s_axis_tvalid = '1' AND m_axis_tready = '1' THEN) AXIS error; s_axis_tready should be checked. The original would be correct if s_axis_tready was directly connected to m_axis_tready. As written, it waits for ready to assert valid.
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- Volume controller: Waits for ready to assert valid (IF s_axis_tvalid = '1' AND m_axis_tready = '1' THEN).
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- Balance: (IF s_axis_tvalid = '1' AND m_axis_tready = '1' THEN) AXI condition is incorrect; the rest is correct.
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