PickleRick/DESD
1
0
Fork 0
Code Issues 2 Pull Requests Releases Activity

Lab 3: Audio Processing System #3

Merged
PickleRick merged 43 commits from LAB3 into main 2025-06-07 22:18:48 +02:00
Conversation 1 Commits 43 Files Changed 45 +7176 -1462
PickleRick commented 2025-05-21 11:26:12 +02:00
Owner
Copy Link

Lab 3: Audio Processing System

File Name Already Written Working Check (100MHz) Check (180MHz) Has testbench Comments Finished and Ready
All_pass_filter ✅️ ✅️ ✅️ ✅️ ✅️ ✅️ ✅️
Balance_controller ✅️ ✅️ ✅️ ✅️ ✅️ ✅️ ✅️
Digilent_jstk2 ✅️ ✅️ ✅️ ✅️ 🔶 ✅️ ✅️
Effect_selector ✅️ ✅️ ✅️ ✅️ ❌ ✅️ ✅️
Led_controller ✅️ ✅️ ✅️ ✅️ ❌ ✅️ ✅️
Led_level_controller ✅️ ✅️ ✅️ ✅️ ❌ ✅️ ✅️
LFO ✅️ ✅️ ✅️ ✅️ ✅️ ✅️ ✅️
Moving_average_filter_en ✅️ ✅️ ✅️ ✅️ ✅️ ✅️ ✅️
Moving_average_filter ✅️ ✅️ ✅️ ✅️ ✅️ ✅️ ✅️
Mute_controller ✅️ ✅️ ✅️ ✅️ ❌ ✅️ ✅️
Volume_controller ✅️ ✅️ ✅️ ✅️ ❌ ✅️ ✅️
Volume_multiplier ✅️ ✅️ ✅️ ✅️ ✅️ ✅️ ✅️
Volume_saturator ✅️ ✅️ ✅️ ✅️ ✅️ ✅️ ✅️

✅️ : Done
❌ : Not done
🔶 : Working on / Can be improved

Timing (180MHz)

Screenshot 2025-05-31 120951.png

Domande

  • Effect_selector: quando premo il pulsante per cambiare freq. dell'LFO il volume deve resettarsi? e vice-versa?
  • LFO: funziona in maniera molto diverse dal loro
  • Moving Average Filter : dobbiamo fare media per canale dx e sx separate? -> Sì
  • Digilent jstk: dobbiamo mandare un'altro dummy byte per perdere i 200us o basta aumentare il delay a 225us?
  • Reset: va implementato anche se non serve/non funziona?
# Lab 3: Audio Processing System | File Name | Already Written | Working | Check (100MHz) | Check (180MHz) | Has testbench | Comments |Finished and Ready | |-----------|:--------------:|:-------:|:-------:|:-------:|:-------:|:-------:|:------------------:| | All_pass_filter | ✅️ | ✅️ | ✅️ | ✅️ | ✅️ | ✅️ | ✅️ | | Balance_controller | ✅️ | ✅️ | ✅️ | ✅️ | ✅️ | ✅️ | ✅️ | | Digilent_jstk2 | ✅️ | ✅️ | ✅️ | ✅️ | 🔶 | ✅️ | ✅️ | | Effect_selector | ✅️ | ✅️ | ✅️ | ✅️ | ❌ | ✅️ | ✅️ | | Led_controller | ✅️ | ✅️ | ✅️ | ✅️ | ❌ | ✅️ | ✅️ | | Led_level_controller | ✅️ | ✅️ | ✅️ | ✅️ | ❌ | ✅️ | ✅️ | | LFO | ✅️ | ✅️ | ✅️ | ✅️ | ✅️ | ✅️ | ✅️ | | Moving_average_filter_en | ✅️ | ✅️ | ✅️ | ✅️ | ✅️ | ✅️ | ✅️ | | Moving_average_filter | ✅️ | ✅️ | ✅️ | ✅️ |✅️ | ✅️ | ✅️ | | Mute_controller | ✅️ | ✅️ | ✅️ | ✅️ | ❌ | ✅️ | ✅️ | | Volume_controller | ✅️ | ✅️ | ✅️ | ✅️ | ❌ | ✅️ | ✅️ | | Volume_multiplier | ✅️ | ✅️ | ✅️ | ✅️ | ✅️ | ✅️ | ✅️ | | Volume_saturator | ✅️ | ✅️ | ✅️ | ✅️ |✅️ | ✅️ | ✅️ | ✅️ : Done ❌ : Not done 🔶 : Working on / Can be improved _________________ ## Timing (180MHz) ![Screenshot 2025-05-31 120951.png](/attachments/92bfdac9-9e86-4ad6-b992-3e17c9a72ec8) _________________ ## Domande - [x] **Effect_selector**: quando premo il pulsante per cambiare freq. dell'LFO il volume deve resettarsi? e vice-versa? - [x] **LFO**: funziona in maniera molto diverse dal loro - [x] **Moving Average Filter** : dobbiamo fare media per canale dx e sx separate? -> **Sì** - [x] **Digilent jstk**: dobbiamo mandare un'altro dummy byte per perdere i 200us o basta aumentare il delay a 225us? - [x] **Reset**: va implementato anche se non serve/non funziona?
Screenshot 2025-05-31 120951.png
38 KiB
PickleRick added 15 commits 2025-05-21 11:26:13 +02:00
Refactor design files for LAB3: update diligent_jstk and add testbench for digilent_jstk2 aa8d8f3c7c
Update VHDL and Python files for improved functionality and performance c3967c3124 
- Updated the date in the diligent_jstk_wrapper.vhd file.
- Modified the testbench (tb_digilent_jstk2.vhd) to ensure proper data transmission and added a delay to simulate real response time.
- Adjusted the digilent_jstk2.vhd file to refine the state machine logic for sending and receiving data, including a new IDLE state and improved handling of the SPI communication.
- Enhanced uart_viewer.py to automatically detect the Basys3 board's serial port, improving user experience and reducing configuration errors.
- Updated the Vivado project file (diligent_jstk.xpr) to reflect changes in simulation and synthesis settings, ensuring compatibility with the latest design updates.
Refactor lab_3.bda to update node IDs and edge connections; modify digilent_jstk2.vhd to increase packet delay and adjust state machine; enhance uart_viewer.py for real-time coordinate visualization using matplotlib; update diligent_jstk.xpr simulation settings and remove unused file sets; add new Vivado project zip files for diligent_jstk and lab3. 55c5c84247
Update digilent_jstk2.vhd to clarify the required packet delay for SPI IP-Core functionality 460378cdaa
Refactor diligent_jstk design files: update clock wizard paths, modify interface nets, enhance uart_viewer.py for real-time data visualization, and remove unused Vivado project zip file. 8fd7db7575
Update design files for diligent_jstk: change synthesis flow mode to Hierarchical, adjust XCI paths, and enhance UART viewer for real-time coordinate visualization with updated axis limits. 1eb2181d1d
Refactor diligent_jstk design files: update interface nets in diligent_jstk.bd, adjust UART interface in uart_viewer.py for enhanced data handling, and modify digilent_jstk2.vhd to remove unnecessary initialization. cb57866a2e
Refactor code structure for improved readability and maintainability c5d238ec94
Remove unused Vivado project zip file 63aa004db9
Refactor LFO, all_pass_filter, and moving_average_filter: enhance output assignments, improve data handling, and streamline signal processing logic for better performance and maintainability. be88f69202
Refactor LFO and design files: update LFO entity parameters, adjust signal handling, and modify project file paths for improved functionality and organization. 6ab3f7bcde
Refactor diligent_jstk design files: update interface nets in diligent_jstk.bd, adjust node connections in diligent_jstk.bda, and modify delay parameter in digilent_jstk2.vhd for improved functionality and performance. 5f30651763
Refactor volume_saturator VHDL code for improved readability and structure; update project files for consistent path references and disable unused components in lab3 design. 1b6bae5183
Readd moving_average_filter_en aab2453819
Add Vivado project files and testbench configurations for volume multiplier and volume saturator 4e3d7c45a2 
- Created `tb_volume_multiplier_behav.wcfg` for waveform configuration of the volume multiplier testbench.
- Added `volume_multiplier.xpr` project file for the volume multiplier design.
- Created `volume_saturator.xpr` project file for the volume saturator design.
- Added `volume_saturator_tb_behav.wcfg` for waveform configuration of the volume saturator testbench.
PickleRick added 1 commit 2025-05-21 20:37:58 +02:00
Refactor volume_multiplier 13cf70b984
PickleRick added 1 commit 2025-05-22 11:23:18 +02:00
Add testbench for balance_controller and update Vivado project files 1d779b7d3a
PickleRick added 1 commit 2025-05-22 16:40:31 +02:00
Refactor balance_controller and volume_multiplier for improved readability; update simulation settings in project files fd7bac0da1
PickleRick added 1 commit 2025-05-23 11:12:20 +02:00
Update volume_multiplier testbench and adjust simulation settings; refactor balance_controller and effect_selector logic d3dd458825
PickleRick added 1 commit 2025-05-23 12:49:57 +02:00
Add moving average filter testbench and configuration files; refactor signal handling in filter components 6cb0e4095e
PickleRick added 1 commit 2025-05-23 16:36:20 +02:00
Refactor and optimize various components in LAB3 design 86bf16abaf 
- Updated lab_3.bda to correct node connections and attributes.
- Enhanced LFO.vhd with improved signal handling and clamping logic.
- Modified all_pass_filter.vhd to ensure proper data transfer.
- Adjusted balance_controller.vhd to incorporate reset logic in signal assignments.
- Cleaned up effect_selector.vhd by removing unnecessary assignments.
- Improved led_level_controller.vhd for better readability and functionality.
- Refined moving_average_filter_en.vhd to streamline AXIS assignments.
- Enhanced mute_controller.vhd for clearer data flow management.
- Updated lab3.xpr to correct file paths and simulation settings.
PickleRick added 1 commit 2025-05-23 17:06:04 +02:00
Update LFO and moving average filter implementations; fix signal assignments and improve clarity 0b9c06d11e
PickleRick added 1 commit 2025-05-26 14:08:25 +02:00
Update to work at 180MHz d4f2772027
PickleRick added 1 commit 2025-05-26 17:46:45 +02:00
Refactor moving average filter to consolidate RX and LX signal handling; remove DX and SX components dfaf7a490e
PickleRick added 1 commit 2025-05-26 18:09:54 +02:00
Update DELAY_US parameter to 225us for SPI IP-Core compatibility; clarify comments ced83d105c
PickleRick added 1 commit 2025-05-26 18:41:56 +02:00
Update clk aa01b3a6e2
PickleRick added 1 commit 2025-05-27 14:19:02 +02:00
Fix LFO 6dea73806c
PickleRick added 1 commit 2025-05-27 16:03:52 +02:00
Update LFO simulation parameters and add new LFO entity; adjust timing and signal handling d1cfa6443b
PickleRick added 1 commit 2025-05-27 17:42:57 +02:00
Add comments 82d76e48d8
PickleRick commented 2025-05-28 17:52:39 +02:00
Author
Owner
Copy Link

ALL PASS FILTER:

  • commento riga 8 non mi sembra necessario (non capisco il suo scopo per questo progetto)

BALANCE CONTROLLER:

  • commento riga 58-> cambierei la parola "knob" con "jstk" o direttamente "joystick"

LED CONTROLLER:

  • nessun commento, bella la tabella di verità finale

LFO_1:

  • commento riga 4 da eliminare e probabilmente anche riga 5 -> Erano i commenti di default che mi sono dimenticato di togliere
  • Domanda: LFO_1 è senza pipeline e LFO è con pipeline giusto? -> Sì, esatto

VOLUME SATURATOR:

  • commento da riga 119 a 122 non so se conviene metterlo, perché ripete le cose che ha detto nella lista numerata del "Saturation purpose e benefit" al contrario (quindi come aspetti negativi del non avere questo blocco).
**ALL PASS FILTER:** - [x] commento riga 8 non mi sembra necessario (non capisco il suo scopo per questo progetto) **BALANCE CONTROLLER:** - [x] commento riga 58-> cambierei la parola "knob" con "jstk" o direttamente "joystick" **LED CONTROLLER:** - [x] nessun commento, bella la tabella di verità finale **LFO_1:** - [x] commento riga 4 da eliminare e probabilmente anche riga 5 -> **Erano i commenti di default che mi sono dimenticato di togliere** - [x] Domanda: LFO_1 è senza pipeline e LFO è con pipeline giusto? -> **Sì, esatto** **VOLUME SATURATOR:** - [x] commento da riga 119 a 122 non so se conviene metterlo, perché ripete le cose che ha detto nella lista numerata del "Saturation purpose e benefit" al contrario (quindi come aspetti negativi del non avere questo blocco).
PickleRick added 1 commit 2025-05-28 18:06:17 +02:00
Update: 92cf8aa5ec 
- comments
- new DELAY_CLK_CYCLES formula
PickleRick added 1 commit 2025-05-28 19:28:28 +02:00
Update SPI clock frequency in testbench and enhance comments in effect selector for clarity on joystick mode switching 1604a7afbc
PickleRick added the due date 2025-06-05 2025-05-28 19:30:56 +02:00
PickleRick added 1 commit 2025-05-30 13:54:44 +02:00
Update clk to 100MHz e21c00512f
PickleRick added 2 commits 2025-05-30 14:32:40 +02:00
Refactor project structure and update dependencies d156d1c944 
- Updated .gitignore to exclude virtual environment and additional test files.
- Modified diligent_jstk.bd to reorganize interface nets for clarity.
- Adjusted diligent_jstk.bda to correct node attributes and edges.
- Revised diligent_jstk_wrapper.vhd to ensure proper port declarations.
- Enhanced uart_viewer.py for improved image handling and serial connection checks.
- Updated diligent_jstk.xpr and lab3.xpr for correct file paths and run configurations.
- Added requirements.txt to specify project dependencies for Python packages.
Update .gitignore, lab_3_wrapper.vhd, lab_3.bd, lab_3.bda, and digilent_jstk2.vhd for improved organization and functionality d65bb35afe
PickleRick added 1 commit 2025-05-30 19:31:52 +02:00
fix: DELAY_CLK_CYCLES 2448aecddf
PickleRick added 1 commit 2025-05-30 21:25:31 +02:00
Remove unused files 6ded9dc0a8
PickleRick added 2 commits 2025-05-31 19:24:51 +02:00
Update: c66c218f65 
- LFO <-> LFO_1
- Effect Selector
- modify led_level_controller (1)
refactor: Improve code readability and organization in led_level_controller.vhd a52023733d
PickleRick added 1 commit 2025-06-01 01:53:57 +02:00
fix: Correct LFO step clock cycle calculations for accurate amplitude modulation 9828eed333
PickleRick added 1 commit 2025-06-01 18:28:58 +02:00
fix: LFO comments 79373768fa
PickleRick added 1 commit 2025-06-03 14:55:36 +02:00
- update comments dff2eb439d 
- add led_level_controller Const
PickleRick added 1 commit 2025-06-03 17:18:52 +02:00
refactor: Enhance comments and code clarity in led_level_controller.vhd c4a48db729
PickleRick added 1 commit 2025-06-03 18:51:06 +02:00
refactor: Improve code comments and enhance clarity in led_level_controller.vhd 2968db7e3f
PickleRick merged commit 1109f8b130 into main 2025-06-07 22:18:48 +02:00
PickleRick deleted branch LAB3 2025-06-07 22:18:48 +02:00
Sign in to join this conversation.
Reviewers
No Reviewers
Labels
No items
No Label
Milestone
No items
No Milestone
Assignees
Clear assignees
PickleRick
No Assignees
1 Participants
Notifications
Due Date
2025-06-05
Dependencies

No dependencies set.

Reference: PickleRick/DESD#3
Delete Branch "LAB3"

Deleting a branch is permanent. Although the deleted branch may continue to exist for a short time before it actually gets removed, it CANNOT be undone in most cases. Continue?