Davide 667632bfa3 Enhance bram_writer and testbench: add data handling for convolution, update state machine, and introduce new configuration files for simulation

2025-04-17 21:29:02 +02:00

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cons

Reorder reset, sys_clock and USB UART ports in lab_2_wrapper and update synthesis flow mode in lab_2.bd

2025-04-09 11:40:21 +02:00

ip/AXI4-Stream_UART

Add new AXI4-Stream UART IP and update .gitignore for Lab2 files

2025-03-31 18:35:29 +02:00

sim

Enhance bram_writer and testbench: add data handling for convolution, update state machine, and introduce new configuration files for simulation

2025-04-17 21:29:02 +02:00

src

Enhance bram_writer and testbench: add data handling for convolution, update state machine, and introduce new configuration files for simulation

2025-04-17 21:29:02 +02:00

test

Refactor bram_writer and test script: improve code readability, update package installation method, and enhance image processing logic

2025-04-17 01:24:18 +02:00

vivado

Enhance bram_writer and testbench: add data handling for convolution, update state machine, and introduce new configuration files for simulation

2025-04-17 21:29:02 +02:00