Davide
9c20fe7e7c
- Created LFO entity for low-frequency oscillation control. - Added all_pass_filter entity for signal processing. - Implemented balance_controller for audio balance adjustments. - Developed debouncer to stabilize input signals. - Introduced digilent_jstk2 for joystick data handling. - Added edge_detector_toggle for edge detection functionality. - Created effect_selector to manage audio effects based on joystick input. - Implemented jstk_uart_bridge for communication between joystick and UART. - Developed led_controller for LED management. - Introduced led_level_controller for controlling multiple LEDs. - Created moving_average_filter for smoothing input signals. - Added moving_average_filter_en with enable functionality. - Implemented mute_controller to handle mute functionality. - Developed volume_controller for volume adjustments. - Introduced volume_multiplier for scaling audio signals. - Created volume_saturator to ensure audio signals stay within bounds.
Digital Electronic System Design
Politecnico di Milano (2024-2025)
📖 Overview
Welcome to the Digital Electronic System Design Laboratory repository!
This repository contains VHDL projects and exercises from the course Digital Electronic System Design at Politecnico di Milano (Course Code: 054083).
The course focuses on:
- FPGA-based digital design
- VHDL simulation, synthesis, and implementation
🛠️ Tools & Hardware
- Software:
- Xilinx Vivado 2020.2 (WebPack Edition)
- Hardware:
- Digilent Basys 3
- FPGA: Xilinx Artix-7 (XC7A35T-1CPG236C)
- Digilent Basys 3
🎯 Course Goals
- Develop practical skills for FPGA-based digital system design
- Implement and test VHDL architectures using Vivado and Basys 3
- Learn about FPGA timing, power, I/O, and memory management
📂 Repository Structure
LABx/src/: VHDL source filessim/: Simulation filescons/: Constraint filesvivado/: Vivado project filestest/: Test files and programs
🚀 Getting Started
Clone the Repository
To get started with this project, follow these steps:
- Open a terminal (e.g., Command Prompt or PowerShell) on your Windows machine.
- Clone the repository using Git:
This will create a folder named
git clone https://github.com/Cd16d/DESDDESD. - Open the folder
\DESDin Visual Studio Code.
Warning
The folder structure in the repository may not match the Vivado project structure.
If you encounter issues with missing or mismatched files in Vivado, refer to the Replacing Files in Vivado section to update the project with the correct files.
Install VHDL Extension
To work with VHDL files in Visual Studio Code, install the VHDL LS extension:
- Open Visual Studio Code.
- Go to the Extensions view by clicking on the Extensions icon in the Activity Bar on the side of the window or pressing
Ctrl+Shift+X. - Search for VHDL LS in the Extensions Marketplace.
- Click Install on the extension by Henrik Bohlin.
- Restart Visual Studio Code to activate the extension.
Open Projects in Vivado
To open and work with the Vivado projects included in this repository:
- Launch Xilinx Vivado 2020.2.
- Click on Open Project in the Vivado start screen.
- Navigate to the desired project directory (e.g.,
LABx/vivado/project_folder/) and select the.xprfile. - Once the project is loaded, you can explore the design, run simulations, or synthesize the project.
Replacing Files in Vivado
If the folder structure in the repository does not match the Vivado project structure:
- Open the Vivado project as described above.
- In the Sources tab, right-click on the file you want to replace and select Replace File.
- Navigate to the correct file in the repository (e.g.,
LABx/src/) and select it. - Ensure the file is added to the correct hierarchy (e.g., as a design source or constraint file).
- Save the project and re-run synthesis or simulation as needed.
By following these steps, you can ensure that the Vivado project is correctly configured and up-to-date with the repository files.
📬 Contact
For any questions or issues open an issue in this repository.