686 lines
19 KiB
Plaintext
686 lines
19 KiB
Plaintext
{
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"design": {
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"design_info": {
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"boundary_crc": "0x7CDC72F2E486A675",
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"device": "xc7a35tcpg236-1",
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"name": "diligent_jstk",
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"rev_ctrl_bd_flag": "RevCtrlBdOff",
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"synth_flow_mode": "None",
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"tool_version": "2020.2",
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"validated": "true"
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},
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"design_tree": {
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"proc_sys_reset_0": "",
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"clk_wiz_0": "",
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"AXI4Stream_UART_0": "",
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"jstk_uart_bridge_0": "",
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"axi4stream_spi_master_0": "",
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"digilent_jstk2_0": ""
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},
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"interface_ports": {
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"usb_uart": {
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"mode": "Master",
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"vlnv": "xilinx.com:interface:uart_rtl:1.0"
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},
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"SPI_M_0": {
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"mode": "Master",
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"vlnv": "xilinx.com:interface:spi_rtl:1.0"
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}
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},
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"ports": {
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"reset": {
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"type": "rst",
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"direction": "I",
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"parameters": {
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"INSERT_VIP": {
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"value": "0",
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"value_src": "default"
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},
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"POLARITY": {
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"value": "ACTIVE_HIGH"
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}
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}
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},
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"sys_clock": {
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"type": "clk",
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"direction": "I",
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"parameters": {
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"CLK_DOMAIN": {
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"value": "diligent_jstk_sys_clock",
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"value_src": "default"
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},
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"FREQ_HZ": {
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"value": "100000000"
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},
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"FREQ_TOLERANCE_HZ": {
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"value": "0",
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"value_src": "default"
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},
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"INSERT_VIP": {
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"value": "0",
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"value_src": "default"
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},
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"PHASE": {
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"value": "0.000"
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}
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}
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}
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},
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"components": {
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"proc_sys_reset_0": {
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"vlnv": "xilinx.com:ip:proc_sys_reset:5.0",
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"xci_name": "diligent_jstk_proc_sys_reset_0_0",
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"xci_path": "ip\\diligent_jstk_proc_sys_reset_0_0\\diligent_jstk_proc_sys_reset_0_0.xci",
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"inst_hier_path": "proc_sys_reset_0",
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"parameters": {
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"RESET_BOARD_INTERFACE": {
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"value": "reset"
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},
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"USE_BOARD_FLOW": {
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"value": "true"
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}
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}
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},
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"clk_wiz_0": {
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"vlnv": "xilinx.com:ip:clk_wiz:6.0",
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"xci_name": "diligent_jstk_clk_wiz_0_1",
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"xci_path": "ip\\diligent_jstk_clk_wiz_0_1\\diligent_jstk_clk_wiz_0_1.xci",
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"inst_hier_path": "clk_wiz_0",
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"parameters": {
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"CLK_IN1_BOARD_INTERFACE": {
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"value": "sys_clock"
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},
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"USE_BOARD_FLOW": {
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"value": "true"
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}
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}
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},
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"AXI4Stream_UART_0": {
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"vlnv": "DigiLAB:ip:AXI4Stream_UART:1.1",
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"xci_name": "diligent_jstk_AXI4Stream_UART_0_0",
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"xci_path": "ip\\diligent_jstk_AXI4Stream_UART_0_0\\diligent_jstk_AXI4Stream_UART_0_0.xci",
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"inst_hier_path": "AXI4Stream_UART_0",
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"parameters": {
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"UART_BAUD_RATE": {
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"value": "115200"
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},
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"UART_BOARD_INTERFACE": {
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"value": "usb_uart"
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},
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"USE_BOARD_FLOW": {
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"value": "true"
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}
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}
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},
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"jstk_uart_bridge_0": {
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"vlnv": "xilinx.com:module_ref:jstk_uart_bridge:1.0",
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"xci_name": "diligent_jstk_jstk_uart_bridge_0_0",
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"xci_path": "ip\\diligent_jstk_jstk_uart_bridge_0_0\\diligent_jstk_jstk_uart_bridge_0_0.xci",
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"inst_hier_path": "jstk_uart_bridge_0",
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"reference_info": {
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"ref_type": "hdl",
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"ref_name": "jstk_uart_bridge",
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"boundary_crc": "0x0"
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},
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"interface_ports": {
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"m_axis": {
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"mode": "Master",
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"vlnv": "xilinx.com:interface:axis_rtl:1.0",
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"parameters": {
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"TDATA_NUM_BYTES": {
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"value": "1",
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"value_src": "constant"
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},
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"TDEST_WIDTH": {
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"value": "0",
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"value_src": "constant"
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},
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"TID_WIDTH": {
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"value": "0",
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"value_src": "constant"
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},
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"TUSER_WIDTH": {
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"value": "0",
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"value_src": "constant"
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},
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"HAS_TREADY": {
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"value": "1",
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"value_src": "constant"
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},
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"HAS_TSTRB": {
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"value": "0",
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"value_src": "constant"
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},
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"HAS_TKEEP": {
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"value": "0",
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"value_src": "constant"
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},
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"HAS_TLAST": {
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"value": "0",
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"value_src": "constant"
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},
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"FREQ_HZ": {
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"value": "100000000",
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"value_src": "ip_prop"
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},
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"PHASE": {
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"value": "0.0",
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"value_src": "ip_prop"
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},
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"CLK_DOMAIN": {
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"value": "/clk_wiz_0_clk_out1",
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"value_src": "ip_prop"
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}
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},
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"port_maps": {
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"TDATA": {
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"physical_name": "m_axis_tdata",
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"direction": "O",
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"left": "7",
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"right": "0"
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},
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"TVALID": {
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"physical_name": "m_axis_tvalid",
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"direction": "O"
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},
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"TREADY": {
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"physical_name": "m_axis_tready",
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"direction": "I"
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}
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}
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},
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"s_axis": {
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"mode": "Slave",
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"vlnv": "xilinx.com:interface:axis_rtl:1.0",
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"parameters": {
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"TDATA_NUM_BYTES": {
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"value": "1",
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"value_src": "constant"
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},
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"TDEST_WIDTH": {
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"value": "0",
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"value_src": "constant"
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},
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"TID_WIDTH": {
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"value": "0",
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"value_src": "constant"
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},
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"TUSER_WIDTH": {
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"value": "0",
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"value_src": "constant"
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},
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"HAS_TREADY": {
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"value": "1",
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"value_src": "constant"
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},
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"HAS_TSTRB": {
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"value": "0",
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"value_src": "constant"
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},
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"HAS_TKEEP": {
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"value": "0",
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"value_src": "constant"
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},
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"HAS_TLAST": {
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"value": "0",
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"value_src": "constant"
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},
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"FREQ_HZ": {
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"value": "100000000",
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"value_src": "ip_prop"
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},
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"PHASE": {
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"value": "0.0",
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"value_src": "ip_prop"
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},
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"CLK_DOMAIN": {
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"value": "/clk_wiz_0_clk_out1",
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"value_src": "ip_prop"
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}
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},
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"port_maps": {
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"TDATA": {
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"physical_name": "s_axis_tdata",
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"direction": "I",
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"left": "7",
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"right": "0"
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},
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"TVALID": {
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"physical_name": "s_axis_tvalid",
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"direction": "I"
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},
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"TREADY": {
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"physical_name": "s_axis_tready",
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"direction": "O"
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}
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}
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}
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},
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"ports": {
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"aclk": {
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"type": "clk",
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"direction": "I",
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"parameters": {
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"ASSOCIATED_BUSIF": {
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"value": "m_axis:s_axis",
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"value_src": "constant"
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},
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"ASSOCIATED_RESET": {
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"value": "aresetn",
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"value_src": "constant"
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},
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"FREQ_HZ": {
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"value": "100000000",
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"value_src": "ip_prop"
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},
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"PHASE": {
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"value": "0.0",
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"value_src": "ip_prop"
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},
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"CLK_DOMAIN": {
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"value": "/clk_wiz_0_clk_out1",
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"value_src": "ip_prop"
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}
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}
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},
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"aresetn": {
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"type": "rst",
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"direction": "I",
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"parameters": {
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"POLARITY": {
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"value": "ACTIVE_LOW",
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"value_src": "constant"
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}
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}
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},
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"jstk_x": {
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"direction": "I",
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"left": "9",
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"right": "0"
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},
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"jstk_y": {
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"direction": "I",
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"left": "9",
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"right": "0"
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},
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"btn_jstk": {
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"direction": "I"
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},
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"btn_trigger": {
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"direction": "I"
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},
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"led_r": {
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"direction": "O",
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"left": "7",
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"right": "0"
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},
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"led_g": {
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"direction": "O",
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"left": "7",
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"right": "0"
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},
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"led_b": {
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"direction": "O",
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"left": "7",
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"right": "0"
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}
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}
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},
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"axi4stream_spi_master_0": {
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"vlnv": "DigiLAB:ip:axi4stream_spi_master:1.0",
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"xci_name": "diligent_jstk_axi4stream_spi_master_0_0",
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"xci_path": "ip\\diligent_jstk_axi4stream_spi_master_0_0\\diligent_jstk_axi4stream_spi_master_0_0.xci",
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"inst_hier_path": "axi4stream_spi_master_0",
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"parameters": {
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"c_sclkfreq": {
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"value": "5000"
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}
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}
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},
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"digilent_jstk2_0": {
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"vlnv": "xilinx.com:module_ref:digilent_jstk2:1.0",
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"xci_name": "diligent_jstk_digilent_jstk2_0_0",
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"xci_path": "ip\\diligent_jstk_digilent_jstk2_0_0\\diligent_jstk_digilent_jstk2_0_0.xci",
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"inst_hier_path": "digilent_jstk2_0",
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"parameters": {
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"SPI_SCLKFREQ": {
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"value": "5000"
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}
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},
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"reference_info": {
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"ref_type": "hdl",
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"ref_name": "digilent_jstk2",
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"boundary_crc": "0x0"
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},
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"interface_ports": {
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"m_axis": {
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"mode": "Master",
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"vlnv": "xilinx.com:interface:axis_rtl:1.0",
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"parameters": {
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"TDATA_NUM_BYTES": {
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"value": "1",
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"value_src": "constant"
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},
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"TDEST_WIDTH": {
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"value": "0",
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"value_src": "constant"
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},
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"TID_WIDTH": {
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"value": "0",
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"value_src": "constant"
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},
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"TUSER_WIDTH": {
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"value": "0",
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"value_src": "constant"
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},
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"HAS_TREADY": {
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"value": "1",
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"value_src": "constant"
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},
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"HAS_TSTRB": {
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"value": "0",
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"value_src": "constant"
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},
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"HAS_TKEEP": {
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"value": "0",
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"value_src": "constant"
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},
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"HAS_TLAST": {
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"value": "0",
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"value_src": "constant"
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},
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"FREQ_HZ": {
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"value": "100000000",
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"value_src": "ip_prop"
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},
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"PHASE": {
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"value": "0.0",
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"value_src": "ip_prop"
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},
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"CLK_DOMAIN": {
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"value": "/clk_wiz_0_clk_out1",
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"value_src": "ip_prop"
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}
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},
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"port_maps": {
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"TDATA": {
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"physical_name": "m_axis_tdata",
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"direction": "O",
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"left": "7",
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"right": "0"
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},
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"TVALID": {
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"physical_name": "m_axis_tvalid",
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"direction": "O"
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},
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"TREADY": {
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"physical_name": "m_axis_tready",
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"direction": "I"
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}
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}
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},
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"s_axis": {
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"mode": "Slave",
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"vlnv": "xilinx.com:interface:axis_rtl:1.0",
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"parameters": {
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"TDATA_NUM_BYTES": {
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"value": "1",
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"value_src": "constant"
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},
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"TDEST_WIDTH": {
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"value": "0",
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"value_src": "constant"
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},
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"TID_WIDTH": {
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"value": "0",
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"value_src": "constant"
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},
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"TUSER_WIDTH": {
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"value": "0",
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"value_src": "constant"
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},
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"HAS_TREADY": {
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"value": "0",
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"value_src": "constant"
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},
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"HAS_TSTRB": {
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"value": "0",
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"value_src": "constant"
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},
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"HAS_TKEEP": {
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"value": "0",
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"value_src": "constant"
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},
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"HAS_TLAST": {
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"value": "0",
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"value_src": "constant"
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},
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"FREQ_HZ": {
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"value": "100000000",
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"value_src": "ip_prop"
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},
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"PHASE": {
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"value": "0.0",
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"value_src": "ip_prop"
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},
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"CLK_DOMAIN": {
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"value": "/clk_wiz_0_clk_out1",
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"value_src": "ip_prop"
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}
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},
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"port_maps": {
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"TDATA": {
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"physical_name": "s_axis_tdata",
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"direction": "I",
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"left": "7",
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"right": "0"
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},
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"TVALID": {
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"physical_name": "s_axis_tvalid",
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"direction": "I"
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}
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}
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}
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},
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"ports": {
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"aclk": {
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"type": "clk",
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"direction": "I",
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"parameters": {
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"ASSOCIATED_BUSIF": {
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"value": "m_axis:s_axis",
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"value_src": "constant"
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},
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"ASSOCIATED_RESET": {
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"value": "aresetn",
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"value_src": "constant"
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},
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"FREQ_HZ": {
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"value": "100000000",
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"value_src": "ip_prop"
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},
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"PHASE": {
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"value": "0.0",
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"value_src": "ip_prop"
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},
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"CLK_DOMAIN": {
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"value": "/clk_wiz_0_clk_out1",
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"value_src": "ip_prop"
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}
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}
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},
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"aresetn": {
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"type": "rst",
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"direction": "I",
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"parameters": {
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"POLARITY": {
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"value": "ACTIVE_LOW",
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"value_src": "constant"
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}
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}
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},
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"jstk_x": {
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"direction": "O",
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"left": "9",
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"right": "0"
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},
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"jstk_y": {
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"direction": "O",
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"left": "9",
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"right": "0"
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},
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"btn_jstk": {
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"direction": "O"
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},
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"btn_trigger": {
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"direction": "O"
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},
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"led_r": {
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"direction": "I",
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"left": "7",
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"right": "0"
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},
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"led_g": {
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"direction": "I",
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"left": "7",
|
|
"right": "0"
|
|
},
|
|
"led_b": {
|
|
"direction": "I",
|
|
"left": "7",
|
|
"right": "0"
|
|
}
|
|
}
|
|
}
|
|
},
|
|
"interface_nets": {
|
|
"axi4stream_spi_master_0_M_AXIS": {
|
|
"interface_ports": [
|
|
"axi4stream_spi_master_0/M_AXIS",
|
|
"digilent_jstk2_0/s_axis"
|
|
]
|
|
},
|
|
"jstk_uart_bridge_0_m_axis": {
|
|
"interface_ports": [
|
|
"AXI4Stream_UART_0/S00_AXIS_TX",
|
|
"jstk_uart_bridge_0/m_axis"
|
|
]
|
|
},
|
|
"digilent_jstk2_0_m_axis": {
|
|
"interface_ports": [
|
|
"digilent_jstk2_0/m_axis",
|
|
"axi4stream_spi_master_0/S_AXIS"
|
|
]
|
|
},
|
|
"AXI4Stream_UART_0_UART": {
|
|
"interface_ports": [
|
|
"usb_uart",
|
|
"AXI4Stream_UART_0/UART"
|
|
]
|
|
},
|
|
"axi4stream_spi_master_0_SPI_M": {
|
|
"interface_ports": [
|
|
"SPI_M_0",
|
|
"axi4stream_spi_master_0/SPI_M"
|
|
]
|
|
},
|
|
"AXI4Stream_UART_0_M00_AXIS_RX": {
|
|
"interface_ports": [
|
|
"AXI4Stream_UART_0/M00_AXIS_RX",
|
|
"jstk_uart_bridge_0/s_axis"
|
|
]
|
|
}
|
|
},
|
|
"nets": {
|
|
"reset_1": {
|
|
"ports": [
|
|
"reset",
|
|
"proc_sys_reset_0/ext_reset_in",
|
|
"clk_wiz_0/reset"
|
|
]
|
|
},
|
|
"sys_clock_1": {
|
|
"ports": [
|
|
"sys_clock",
|
|
"clk_wiz_0/clk_in1"
|
|
]
|
|
},
|
|
"clk_wiz_0_locked": {
|
|
"ports": [
|
|
"clk_wiz_0/locked",
|
|
"proc_sys_reset_0/dcm_locked"
|
|
]
|
|
},
|
|
"clk_wiz_0_clk_out1": {
|
|
"ports": [
|
|
"clk_wiz_0/clk_out1",
|
|
"proc_sys_reset_0/slowest_sync_clk",
|
|
"axi4stream_spi_master_0/aclk",
|
|
"AXI4Stream_UART_0/clk_uart",
|
|
"AXI4Stream_UART_0/m00_axis_rx_aclk",
|
|
"jstk_uart_bridge_0/aclk",
|
|
"AXI4Stream_UART_0/s00_axis_tx_aclk",
|
|
"digilent_jstk2_0/aclk"
|
|
]
|
|
},
|
|
"digilent_jstk2_0_btn_trigger": {
|
|
"ports": [
|
|
"digilent_jstk2_0/btn_trigger",
|
|
"jstk_uart_bridge_0/btn_trigger"
|
|
]
|
|
},
|
|
"digilent_jstk2_0_btn_jstk": {
|
|
"ports": [
|
|
"digilent_jstk2_0/btn_jstk",
|
|
"jstk_uart_bridge_0/btn_jstk"
|
|
]
|
|
},
|
|
"digilent_jstk2_0_jstk_y": {
|
|
"ports": [
|
|
"digilent_jstk2_0/jstk_y",
|
|
"jstk_uart_bridge_0/jstk_y"
|
|
]
|
|
},
|
|
"digilent_jstk2_0_jstk_x": {
|
|
"ports": [
|
|
"digilent_jstk2_0/jstk_x",
|
|
"jstk_uart_bridge_0/jstk_x"
|
|
]
|
|
},
|
|
"jstk_uart_bridge_0_led_r": {
|
|
"ports": [
|
|
"jstk_uart_bridge_0/led_r",
|
|
"digilent_jstk2_0/led_r"
|
|
]
|
|
},
|
|
"jstk_uart_bridge_0_led_g": {
|
|
"ports": [
|
|
"jstk_uart_bridge_0/led_g",
|
|
"digilent_jstk2_0/led_g"
|
|
]
|
|
},
|
|
"jstk_uart_bridge_0_led_b": {
|
|
"ports": [
|
|
"jstk_uart_bridge_0/led_b",
|
|
"digilent_jstk2_0/led_b"
|
|
]
|
|
},
|
|
"proc_sys_reset_0_peripheral_aresetn": {
|
|
"ports": [
|
|
"proc_sys_reset_0/peripheral_aresetn",
|
|
"AXI4Stream_UART_0/m00_axis_rx_aresetn",
|
|
"jstk_uart_bridge_0/aresetn",
|
|
"AXI4Stream_UART_0/s00_axis_tx_aresetn",
|
|
"axi4stream_spi_master_0/aresetn",
|
|
"digilent_jstk2_0/aresetn"
|
|
]
|
|
},
|
|
"proc_sys_reset_0_peripheral_reset": {
|
|
"ports": [
|
|
"proc_sys_reset_0/peripheral_reset",
|
|
"AXI4Stream_UART_0/rst"
|
|
]
|
|
}
|
|
}
|
|
}
|
|
} |