This website requires JavaScript.
Explore
Help
Register
Sign In
PickleRick
/
DESD
Watch
1
Star
0
Fork
0
You've already forked DESD
Code
Issues
2
Pull Requests
Releases
Activity
Files
b2d3060247a6c41a084e18c9d13c64db4f8607ff
DESD
/
LAB2
History
Davide
b2d3060247
Refactor image processing components: update bit depth in rgb2gray and divider_by_3, enhance img_conv architecture, and adjust simulation settings
2025-04-11 18:06:02 +02:00
..
cons
Reorder reset, sys_clock and USB UART ports in lab_2_wrapper and update synthesis flow mode in lab_2.bd
2025-04-09 11:40:21 +02:00
ip
/AXI4-Stream_UART
Add new AXI4-Stream UART IP and update .gitignore for Lab2 files
2025-03-31 18:35:29 +02:00
sim
Refactor image processing components: update bit depth in rgb2gray and divider_by_3, enhance img_conv architecture, and adjust simulation settings
2025-04-11 18:06:02 +02:00
src
Refactor image processing components: update bit depth in rgb2gray and divider_by_3, enhance img_conv architecture, and adjust simulation settings
2025-04-11 18:06:02 +02:00
test
Add new AXI4-Stream UART IP and update .gitignore for Lab2 files
2025-03-31 18:35:29 +02:00
vivado
Refactor image processing components: update bit depth in rgb2gray and divider_by_3, enhance img_conv architecture, and adjust simulation settings
2025-04-11 18:06:02 +02:00