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PickleRick
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DESD
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c712b160cc694606c47b93ece22fc4ba8658c0ae
DESD
/
LAB2
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Davide
c712b160cc
Refactor RGB to Grayscale conversion: update divider component and add testbench
2025-04-11 13:00:46 +02:00
..
cons
Reorder reset, sys_clock and USB UART ports in lab_2_wrapper and update synthesis flow mode in lab_2.bd
2025-04-09 11:40:21 +02:00
ip
/AXI4-Stream_UART
Add new AXI4-Stream UART IP and update .gitignore for Lab2 files
2025-03-31 18:35:29 +02:00
sim
Refactor RGB to Grayscale conversion: update divider component and add testbench
2025-04-11 13:00:46 +02:00
src
Refactor RGB to Grayscale conversion: update divider component and add testbench
2025-04-11 13:00:46 +02:00
test
Add new AXI4-Stream UART IP and update .gitignore for Lab2 files
2025-03-31 18:35:29 +02:00
vivado
Refactor RGB to Grayscale conversion: update divider component and add testbench
2025-04-11 13:00:46 +02:00
