Davide e2bcbf7d31 Add testbench for packetizer: implement behavioral testbench, configure simulation settings, and define stimulus for packetization process

2025-04-22 16:24:22 +02:00

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cons

Reorder reset, sys_clock and USB UART ports in lab_2_wrapper and update synthesis flow mode in lab_2.bd

2025-04-09 11:40:21 +02:00

ip/AXI4-Stream_UART

Add new AXI4-Stream UART IP and update .gitignore for Lab2 files

2025-03-31 18:35:29 +02:00

sim

Add testbench for packetizer: implement behavioral testbench, configure simulation settings, and define stimulus for packetization process

2025-04-22 16:24:22 +02:00

src

Add testbench for packetizer: implement behavioral testbench, configure simulation settings, and define stimulus for packetization process

2025-04-22 16:24:22 +02:00

test

Add testbench for LED blinker, enhance bram_writer with state management, and update test script for overflow/underflow handling

2025-04-17 22:55:49 +02:00

vivado

Add testbench for packetizer: implement behavioral testbench, configure simulation settings, and define stimulus for packetization process

2025-04-22 16:24:22 +02:00