Digital Electronic System Design

Politecnico di Milano (2024-2025)

📖 Overview

Welcome to the Digital Electronic System Design Laboratory repository!
This repository contains VHDL projects and exercises from the course Digital Electronic System Design at Politecnico di Milano (Course Code: 054083).

The course focuses on:

• FPGA-based digital design
• VHDL simulation, synthesis, and implementation

🛠️ Tools & Hardware

• Software:
  • Xilinx Vivado 2020.2 (WebPack Edition)
• Hardware:
  • Digilent Basys 3
    • FPGA: Xilinx Artix-7 (XC7A35TCPG236C-1)

🎯 Course Goals

• Develop practical skills for FPGA-based digital system design
• Implement and test VHDL architectures using Vivado and Basys 3
• Learn about FPGA timing, power, I/O, and memory management

📂 Repository Structure

• LABx/
  • src/: VHDL source files
  • sim/: Simulation files
  • cons/: Constraint files
  • vivado/: Vivado project files

📬 Contact

For any questions or issues open an issue in this repository.