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1e84f090b7
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Implement state machine in depacketizer for packet processing and add top auto-set option in project configuration
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2025-04-09 12:52:28 +02:00 |
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360ae72198
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Reorder reset, sys_clock and USB UART ports in lab_2_wrapper and update synthesis flow mode in lab_2.bd
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2025-04-09 11:40:21 +02:00 |
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cd5d1b8a0c
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Add new AXI4-Stream UART IP and update .gitignore for Lab2 files
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2025-03-31 18:35:29 +02:00 |
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a5264642a6
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Add new VHDL entities for image processing and update test scripts for Lab2
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2025-03-29 00:50:32 +01:00 |
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163ad448f8
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Update .gitignore and enhance README.md; add new VHDL files for KittCarPWM, ShiftRegisters, and PulseWidthModulator
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2025-03-20 15:05:27 +01:00 |
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