Commit Graph

9 Commits

Author SHA1 Message Date
31f66ef8d1 Update design files: modify timestamps, enhance signal connections, and improve comments for clarity; remove archived project files 2025-04-25 22:18:03 +02:00
835b4d0ab8 Refactor and update various components in LAB2 design
- Updated node connections in lab_2.bda and pak_depak.bda to correct source and target references.
- Modified pak_depak_wrapper.vhd to reflect the correct timestamp.
- Rearranged the order of components in pak_depak.bd for clarity and consistency.
- Adjusted BRAM writer logic in bram_writer.vhd for improved data handling and comments for clarity.
- Enhanced depacketizer.vhd with additional comments and logic adjustments for better data reception.
- Refined divider_by_3.vhd to optimize division calculations and improve clarity in comments.
- Improved img_conv.vhd with better state management and comments for the convolution process.
- Updated led_blinker.vhd to enhance readability and maintainability with clearer comments.
- Enhanced packetizer.vhd to improve data handling and added comments for better understanding.
- Adjusted rgb2gray.vhd to include standard library comments for consistency.
- Updated test.py to improve image processing logic and added visualization for differences.
- Added new binary files for test_nopath.exe and archived project files for lab2 and pak_depak.
- Updated Vivado project files to ensure correct paths and settings for synthesis and implementation.
2025-04-25 00:43:10 +02:00
75fb66e531 Refactor rgb2gray and divider_by_3: update signal handling, enhance state management, and improve stimulus memory for better functionality and clarity 2025-04-24 11:25:39 +02:00
5995a532f5 Refactor testbench for bram_writer: update description, increase image size, and enhance signal handling for improved simulation accuracy 2025-04-23 01:49:46 +02:00
f014f8c341 Refactor and clean up project files
- Removed obsolete GraphML file `pak_depak.bda` and UI file `bd_c9b29a54.ui`.
- Updated `rgb2gray.vhd` to improve signal handling and state machine logic.
- Created new Vivado project files for `depacketizer_test`, including testbench configuration.
- Adjusted `pak_depak.xpr` to disable the FIFO module and set the top module correctly.
- Updated `rgb2grey_test.xpr` to modify simulation launch settings.
2025-04-22 22:32:01 +02:00
b2d3060247 Refactor image processing components: update bit depth in rgb2gray and divider_by_3, enhance img_conv architecture, and adjust simulation settings 2025-04-11 18:06:02 +02:00
c712b160cc Refactor RGB to Grayscale conversion: update divider component and add testbench 2025-04-11 13:00:46 +02:00
0d805b93b6 Refactor RGB to Grayscale Converter and Add Divider Component
- Updated the rgb2gray.vhd file to improve readability and structure, including consistent casing for keywords and signals.
- Implemented a new divider_by_3 component to calculate the grayscale value by dividing the sum of RGB channels by 3.
- Enhanced the state machine in rgb2gray to handle RGB input and output grayscale values correctly.
- Updated the Vivado project file to include the new divider_by_3.vhd for synthesis and simulation.
- Modified vhdl_ls.toml to include unisim files for third-party library support.
2025-04-11 01:50:19 +02:00
a5264642a6 Add new VHDL entities for image processing and update test scripts for Lab2 2025-03-29 00:50:32 +01:00